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SOUTHERN TAIWAN UNIVERSITY
Department of Electrical Engineering
SEMINAR
DESIGN A DIRECT DIGITAL SYNTHESIS (DDS)
USING FPGA
Student: Dang Thanh Trung
May 16th ,2012
OUTLINE
1. Introduction
2. DDS block diagram and waveforms
3. The structure of DDS on FPGA
4. Simulation result
5. Conclusions
6. References
1. Introduction
Direct Digital Synthesis (DDS) is a type of
frequency synthesis for using digital data processing
blocks as a means to generate a frequency and phase
tunable output signal referenced to a fixed-frequency
precision clock source.
Applications of DDS include: signal generation,
local oscillators in communication systems, function
generators, mixers, modulators, sound synthesizers,…
2. DDS block diagram and waveforms
ΔØ : Frequency Word
N: The length in bits of frequency word
F clk= Sample CLK Input frequency
3. The structure of DDS on FPGA
Phase accumulator
Data(15:0)
Clk
D
Q
DataA(15:0)
Fd1
Result(15:0)
C
DataB(15:0)
D
Adder_1
CI
Q
Fd2
C
Q
D
Fd3
C
Result(n+1) = Result(n) +Data(n)
CO
Phase_16(15:0)
3. The structure of DDS on FPGA
Phase Modulation
Phase_16(15:0)
Result(15:0)
DataA(15:0)
Phase_offset(15:0) DataB(15:0)
Q
D
Adder_2
Fd4
C
D
Phase_sum(15)
Q
mbs_1
Q
Phase_7(6:0)
Fd5
Phase_sum(14)
C
Phase_sum(13:7)
Mux
"1111111"
Clk
D
Fd6
C
3. The structure of DDS on FPGA
Sin ROM table
D
Phase_7(6:0)
ROM
Q
data_DAC(6:0)
Q
sign_DAC
Fd7
table_value(6:0)
INVERT
C
Mux
Clk
mbs_1
D
Fd8
C
4. Simulation result
EX: frequency word ( N = 32 bits)
ΔØ = “00001000000000000000000000000000”
We have: fout =227 *Fclk 2 32
Tout =25 Tclk = 32 Tclk
Conclusions
From Simulation result, we can see that output signal exactly
References
[1] H. T. Nicholas, H. Samueli, and B. Kim, "The Optimization of Direct
Digital Frequency Synthesizer Performance in the Presence of Finite Word
Length Effects," in Proc. 42nd Annu. Frequency Contr. Symp., 1988, pp.
357-363.
[2] M. Duhalde, and A. Greiner, "A High Performance Modular Embedded
ROM Architecture", in Proc. ISCAS, May 1995, pp. 1057-1060.
[3] A. B. Grebene, Bipolar and MOS Analog Integrated Circuit Design.
John Wiley & Sons, New York 1984.
[4] C. A. A. Bastiaansen, D. W. J. Groeneveld, H. J. Schouwenaars, and H. A.
H. Termeer, "A 10-b 40-MHz 0.8-mm CMOS Current-Output D/AConverter”, IEEE JSSC, Vol. 26, No. 7, pp. 917-921, July 1991
[5] Jouko Vankka, Mikko Waltari, Marko Kosunen, Kari Halonen
”A DIRECT DIGITAL SYNTHESIZER WITH AN ON-CHIP D/ACONVERTER”.
[6]. Chang K.C (1999), Digital Systems Design with VHDL and Synthesis—
An Integrated Approach, Los Alamitos, CA: IEEE Computer Society Press.
[7]. Steve Kilts (2007),Advanced FPGA Design: Architecture,
Implementation and Optimization, New York.