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Direct Digital Synthesizer
STUDENT ：Tsung-Han Tu
SN
：M9720112
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Direct Digital Synthesizer(1/2)
 fm (t )  A cos(ct  2K f  m( )d )
K：
f frequency deviation constant ( Hz / V )

The DDS is constructed by a ROM with many
samples of a sine wave stored in it.

The DDS produces sinusoidal signal. The frequency
of the output signal for a n-bit system is determined
by：
 fo 
m  f clk
2n
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Direct Digital Synthesizer(2/2)
Fig. 1 Block diagram of a DDS system.
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Multiple frequencies from a single DDS(1/3)

Instead of using only one frequency setting word (FSW)
three of them are employed.

The formula, which gives the output frequency.
m  f clk
 fo  n
2 k
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Multiple frequencies from a single DDS(2/3)

Two non-consecutive outputs of the line decoder are used
for the generation of the 57 KHz signal.
Fig. 4 Block diagram of a multiplexed DDS system.
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FPGA
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Multiple frequencies from a single DDS(3/3)

Waveforms produced at the three outputs of the
multiplexed DDS.
Fig. 5 From top to bottom the 19KHz, 57KHz and 38KHz waveforms.
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Thanks
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