Transcript Busses and Internal Communications

Computers
Internal Communication
Basic Computer System
Processor
ALU
CNTL
.....
BUS
Interconnections
I/O module
CONTROLLER
MAIN MEMORY
Memory
BUS
Local and Peripheral
Bus
Bus Operation
Transfer Quantity (word)
Address bus
Control bus
Data bus
Speed
Clock speed
Controller
REGISTER
PROCESSOR
REGISTER
REGISTER
BUFFER
Controller Operation
CPU
passes
parameters
into
the
Data
Card
Controller
is
processor
transferred
transfers
checks
from
data
the
the
into
CRC
buffer
theregisters
card
to the
buffer
bus
PROCESSOR
REGISTER
VALUE
REGISTER
VALUE
REGISTER
VALUE
HEADER
BUFFER
CRC
BUFFER
BUFFER
BUFFER
BUFFER
BUFFER
BUFFER
BUFFER
BUFFER
BUFFER
BUFFER
BUFFER
BUFFER
I/O Operations
For the I/O device to communicate with
the CPU, the designer includes
additional registers in the CPU.
•I/O Address Register contains address of
I/O device
•I/O Buffer Register contains the value to
be transferred to/from the I/O device
I/O Registers
CONTROL
300
PC
I/O Address
IR
I/O Buffer
ARITHMETIC-LOGIC
ACCUM
PROGRAM
300
301
302
1940
5941
2941
DATA
940
941
0003
0002
I/O Processing
Programmed I/O
Control
Test
Read/Write
Interrupt Driven I/O
Direct Memory Access
1. Programmed I/O
Issue an I/O request
Wait until I/O finished
Continue program
CPU is tied up checking the I/O
device until the response is ready.
Solution: Interrupt Processing
2. Interrupt Processing
Issue an I/O request
Store program parameters
Start another process
Process interrupt
Return to original process
3. DMA
Processor issues a request,
then
Goes about its business
DMA module transfers the data,
then
Tells the processor
Programmed I/O
Issue an I/O request
Wait until I/O finished
Continue program
CPU is tied up checking the I/O
device until the response is ready.
Solution: Interrupt Processing
Interrupt Processing
Interrupt Processing
Interrupt Processing
Start
FETCH
EXECUTE
Halt
CHECK
INTERRUPT
Interrupt Processing
Issue an I/O request
Store program parameters
Start another process
Process interrupt
Return to original process
Classes of Interrupts
Program: illegal program
operations
Timer: scheduled special
operations
I/O: device controller signals
completion of operations or error
Hardware Failure: power failure,
memory parity error, etc.
Interrupt Request (IRQ)
Registers
CONTROL
300
ARITHMETICLOGIC
PC
I/O Address
IRQ
IR
I/O Buffer
Stack Addr.
PROGRAM
300
301
302
1940
5941
2941
ACCUM
DATA
940
941
0003
0002
Interrupt Stack
Add a CPU register:
stack pointer.
Recognize interrupt
Store register
contents (push
stack)
Process interrupt
Restore register
contents (pop stack)
STACK
Base Address
PROGRAM COUNTER
INSTRUCTION REGISTER
ACCUMULATOR
Etc.
May also contain interim
program values
Data Transfer:
Interrupt Driven I/O
MAIN MEMORY
DBUFFER
A T A
CPU
CONTROLLER
DASD
Data Transfer:
Direct Memory Access
MAIN MEMORY
DBUFFER
A T A
CPU
CONTROLLER
DASD