Transcript 12.NuMicro_SPI.ppt

Serial Peripheral Interface
Department of Electrical Engineering,
National Taiwan Ocean University
5/23/2013
Richard Kuo
Assistant Professor
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OutLine
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Serial Peripheral Interface Introduction
– 12.NuMicro_SPI.ppt
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Exercise : use SPI interface to LCD 128x64 (Smpl_SPI_QC12864B)
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Exercise: use SPI read/write SPI Flash (Smpl_SPI_Flash)
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Exercise: use SPI & PDMA access SPI Flash (Smpl_SPI2_Flash)
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Exercise : use SPI interface with RF2.4GHz (Smpl_SPI_RF24L01)
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Exercise : use SPI interface with RF2.4GHz (Smpl_SPI_A7125)
SPI (Serial Peripheral Interface)
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Typical SPI connection
SPI signals
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Daisy-Chain configuration of multiple SPI devices
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SPI Write Cycle
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SPI Read Cycle
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SPI waveform
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Daisy Chain Write Cycle
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Daisy Chain Read Cycle
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SPI Timing Diagram
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SPI Timing Parameter
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SPI Pin Assignment
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SPI signals
SPI0
SPI1
SPI2
SPI3
CS
GPC0
GPC8
GPD0
GPD8
CLK
GPC1
GPC9
GPD1
GPD9
DI0 (MISO)
GPC2
GPC10
GPD2
GPD10
DO0 (MOSI)
GPC3
GPC11
GPD3
GPD11
DI1
GPC4
GPC12
GPD4
GPD12
DO1
GPC5
GPC13
GPD5
GPD13
I2S Codec
(WAU8822)
SD/MMC
EEPROM
(W25Q16CV)
LCD
Nu-LB-NUC140
On-Board
SPI EEPROM schematic
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SPI LCD schematic
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SPI Controller Features
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Up to four SPI controllers
Each SPI controller can drive up to two slave devices in master mode
Support master/slave mode operation
Support 1-channel or 2-channel serial data IN/OUT
Configurable data length
Provide burst mode operation
MSB or LSB first
Support Word- and Byte-Suspend function
Support DMA-transmitting and DMA-receiving
Support SPI mode 0 ~ mode 4
SPI Feature Summary
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The maximum SPI clock frequency is 20MHz in master mode,
10MHz in slave mode
Drive up to eight SPI slave devices in master mode
Configurable clock polarity and transfer timing
Support two-channel I/O transfer
Automatic slave select
SPI block diagram
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Clock Generator
APB
SPICLKx
APB
IF
(32-bits)
Status/Control
Register
SPISSx0
1-channel I/O
SPISSx1
Core Logic
PIO
MOSIx0
MISOx0
TX Bufer/
TX Bufer/
Shifter
Shifter
MOSIx1
DMA
RX Bufer/
RX Bufer/
Shifter
Shifter
MISOx1
2-channel I/O
One-Channel Master Mode System Diagram
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NUC100
(SPI Master)
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SPICLK
SCLK
MISO
MISO
Slave 0
MOSI
SPISSx0
MOSI
SS
SPISSx1
2 Slave Select
Prevent from bus conflict
SCLK
MISO
Slave 1
MOSI
SS
One-Channel Slave Mode System Diagram
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SPI Clock
NUC100
(SPI Slave)
SPICLK
SCLK
MISO
MISO
Master
MOSI
MOSI
SPISSx0
SS
Slave Select
SPISSx1
Two-Channel Master Mode System Diagram
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Channel 0
SPICLK
SCLK
MISOx0
MISO
MOSIx0
MOSI
NUC100
MISOx1
(SPI Master)
Channel 1
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Slave 0
SS
MOSIx1
SPISSx0
SPISSx1
SCLK
MISO
Slave 1
MOSI
SS
Two-Channel Master Mode Timing Diagram
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SS_LVL=1
SPISS
SS_LVL=0
CLKP=0
SPICLK
Channel 0
CLKP=1
MISOx0
MSB
Tx0[31]
Tx0[30]
Tx0[16]
Tx0[15]
Tx0[14]
LSB
Tx0[0]
MOSIx0
MSB
Rx0[31]
Rx0[30]
Rx0[16]
Rx0[15]
Rx0[14]
LSB
Rx0[0]
MISOx1
MSB
Tx1[31]
Tx1[30]
Tx1[16]
Tx1[15]
Tx1[14]
LSB
Tx1[0]
MOSIx1
MSB
Rx1[31]
Rx1[30]
Rx1[16]
Rx1[15]
Rx1[14]
LSB
Rx1[0]
Channel 1
Smpl_SPI_QC12864B
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NU-LB-NUC140 + QC12864B
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NuTiny-SDK-NUC140 + QC12864B
QC12864B is a LCD 128x64, its interface is SPI.
Smpl_SPI_QC12864B
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// LCD QC12864B module
// pin 1 : Vss to Gnd
// pin 2 : Vcc to Vcc+5V
// pin 3 : 0V to N.C.
// pin 4 : CS to NUC140 SPI1_CS (GPC8 /pin61)
// pin 5 : SID to NUC140 SPI1_DO0 (GPC11/pin58)
// pin 6 : SCLK to NUC140 SPI1_CLK (GPC9 /pin60)
// pin 7~14: N.C.
// pin 15: PSB to Gnd (0=Serial-port mode, 1=Parallel-port mode)
// pin 16: N.C.
// pin 17: RST to Vcc
// pin 18: N.C.
// pin 19: LED_A to +5V (Backlight Anode)
// pin 20: LED_K to Gnd (Backlight Cathode)
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Smpl_SPI_QC12864B
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void LCD_WriteCommand(uint8_t cmd)
{
SPI1->SSR.SSR=1;
SPI1->TX[0] =0x00F8;
SPI1->CNTRL.GO_BUSY = 1;
while ( SPI1->CNTRL.GO_BUSY == 1 );
SPI1->TX[0] =0x00F0 & cmd;
SPI1->CNTRL.GO_BUSY = 1;
while ( SPI1->CNTRL.GO_BUSY == 1 );
SPI1->TX[0] =0x00F0 &
(cmd<<4);
SPI1->CNTRL.GO_BUSY = 1;
while ( SPI1->CNTRL.GO_BUSY == 1 );
SPI1->SSR.SSR=0;
}
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void LCD_WriteData(unsigned char data)
{
SPI1->SSR.SSR=1;
SPI1->TX[0] =0x00FA;
SPI1->CNTRL.GO_BUSY = 1;
while ( SPI1->CNTRL.GO_BUSY == 1 );
SPI1->TX[0] =0x00F0 & data;
SPI1->CNTRL.GO_BUSY = 1;
while ( SPI1->CNTRL.GO_BUSY == 1 );
SPI1->TX[0] =0x00F0 & (data<<4);
SPI1->CNTRL.GO_BUSY = 1;
while ( SPI1->CNTRL.GO_BUSY == 1 );
SPI1->SSR.SSR=0;
}
Smpl_SPI_QC12864B
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void Init_QC12864B(void)
{
LCD_WriteCommand(0x30);
DrvSYS_Delay(50);
LCD_WriteCommand(0x0c);
DrvSYS_Delay(50);
}
void Clear_QC12864B(void)
{
LCD_WriteCommand(0x01);
}
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void Print_QC12864B(uint8_t line, unsigned
char *string)
{
uint8_t i, addr;
if
(line==0) addr = 0x80;
else if (line==1) addr = 0x90;
else if (line==2) addr = 0x88;
else if (line==3) addr = 0x98;
else
addr = 0x80;
LCD_WriteCommand(addr);
for (i=0; i<16; i++)
LCD_WriteData(*string++);
}
Smpl_SPI_QC12864B
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int main(void)
{
UNLOCKREG();
DrvSYS_SetOscCtrl(E_SYS_XTL12M, 1); // Enable the 12MHz oscillator oscillation
DrvSYS_SelectHCLKSource(0); // HCLK clock source
LOCKREG();
DrvSYS_SetClockDivider(E_SYS_HCLK_DIV, 0);
// Configure SPI1 as a master to access LCD Q12864B
DrvGPIO_InitFunction(E_FUNC_SPI1);
DrvSPI_Open(eDRVSPI_PORT1, eDRVSPI_MASTER, eDRVSPI_TYPE1, 8);
DrvSPI_SetEndian(eDRVSPI_PORT1, eDRVSPI_MSB_FIRST);
DrvSPI_DisableAutoSS(eDRVSPI_PORT1);
DrvSPI_SetSlaveSelectActiveLevel(eDRVSPI_PORT1,
eDRVSPI_ACTIVE_HIGH_RISING);
Smpl_SPI_QC12864B
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//DrvSPI_EnableInt(eDRVSPI_PORT1, SPI1_Callback, 0);
DrvSPI_SetClockFreq(eDRVSPI_PORT1, 50000, 0); // set SPI clock = 50KHz
Init_QC12864B();
Clear_QC12864B();
Print_QC12864B(0,"Smpl_SPI_Q12864B");
Print_QC12864B(1,"Academic Example");
Print_QC12864B(2,"Nuvoton NuMicro ");
Print_QC12864B(3,"NU-LB-NUC140 ");
}
Smpl_GPIO_QC12864B
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void Init_SPI(void)
{
DrvGPIO_Open(E_GPC, 8, E_IO_OUTPUT); // SPI_CS
DrvGPIO_Open(E_GPC, 9, E_IO_OUTPUT); // SPI_CLK
DrvGPIO_Open(E_GPC,11, E_IO_OUTPUT); // SPI_DO
DrvGPIO_ClrBit(E_GPC, 8);
DrvGPIO_ClrBit(E_GPC, 9);
DrvGPIO_ClrBit(E_GPC,11);
}
void SPI_CS(uint8_t pol)
{
if (pol!=0) DrvGPIO_SetBit(E_GPC, 8);
else
DrvGPIO_ClrBit(E_GPC, 8);
}
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Smpl_GPIO_QC12864B
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void SPI_Write(unsigned char zdata)
{
unsigned int i;
for(i=0; i<8; i++)
{
if((zdata << i) & 0x80)
DrvGPIO_SetBit(E_GPC, 11); // SID = 1;
else
DrvGPIO_ClrBit(E_GPC, 11); // SID = 0;
DrvGPIO_ClrBit(E_GPC,9); //SCLK = 0;
DrvSYS_Delay(10);
DrvGPIO_SetBit(E_GPC,9); //SCLK = 1;
}
}
Use GPIO pins emulate SPI signals
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Smpl_GPIO_QC12864B
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void LCD_WriteCommand(uint8_t cmd)
{
SPI_CS(1);
SPI_Write(0xF8);
SPI_Write(0xF0 & cmd);
SPI_Write(0xF0 & (cmd<<4));
SPI_CS(0);
}
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void LCD_WriteData(unsigned char data)
{
SPI_CS(1);
SPI_Write(0xFA);
SPI_Write(0xF0 & data);
SPI_Write(0xF0 & (data<<4));
SPI_CS(0);
}
Smpl_GPIO_QC12864B
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int main(void)
{
UNLOCKREG();
DrvSYS_SetOscCtrl(E_SYS_XTL12M, 1); // Enable the 12MHz oscillator oscillation
DrvSYS_SelectHCLKSource(0); // HCLK clock source. 0: external 12MHz; 4:internal
22MHz RC oscillator
LOCKREG();
Init_SPI(); // Initial GPIOs to emulate SPI pins
Init_QC12864B(); // initialize LCD
Clear_QC12864B(); // clear LCD
Print_QC12864B(0,"Smpl_GPIO_Q12864");
Print_QC12864B(1,"Academic Example");
Print_QC12864B(2,"Nuvoton NuMicro ");
Print_QC12864B(3,"NU-LB-NUC140 ");
}
SPI Flash Block Diagram
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SPI Flash Instruction Table
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Smpl_SPI_Flash_PDMA
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// Configure SPI2 as a master to access SPI-Flash
DrvGPIO_InitFunction(E_FUNC_SPI2); // GPIO Init for SPI2
/* Configure SPI2 as a master, Type1 waveform, 32-bit transaction */
DrvSPI_Open(eDRVSPI_PORT2, eDRVSPI_MASTER, eDRVSPI_TYPE1, 32);
DrvSPI_SetEndian(eDRVSPI_PORT2, eDRVSPI_MSB_FIRST); // MSB First
DrvSPI_DisableAutoSS(eDRVSPI_PORT2); // Disable the automatic slave select function of SS0
/* Set the active level of slave select. */
DrvSPI_SetSlaveSelectActiveLevel(eDRVSPI_PORT2, eDRVSPI_ACTIVE_LOW_FALLING);
/* Enable the SPI0 interrupt and install the callback function. */
// DrvSPI_EnableInt(eDRVSPI_PORT2, SPI2_Callback, 0);
DrvSPI_SetClockFreq(eDRVSPI_PORT2, 1000000, 0); //SPI clock rate 1MHz
SPI Flash Write Enable/Disable
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SPI Flash Page Program
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Spiflash_PageProgram
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void SpiFlash_PageProgram(uint32_t StartAddress, uint32_t ByteCount)
{
uint32_t au32SourceData;
DrvSPI_SetBitLength(eDRVSPI_PORT2, 8); // configure transaction length as 8 bits
DrvSPI_SetSS(eDRVSPI_PORT2, eDRVSPI_SS0); // /CS: active
au32SourceData = 0x06; // send Command: 0x06, Write enable
DrvSPI_SingleWrite(eDRVSPI_PORT2, &au32SourceData);
while (DrvSPI_IsBusy(eDRVSPI_PORT2)) {} // wait
DrvSPI_ClrSS(eDRVSPI_PORT2, eDRVSPI_SS0); // /CS: de-active
DrvSPI_SetSS(eDRVSPI_PORT2, eDRVSPI_SS0); // /CS: active
au32SourceData = 0x02; // send Command: 0x02, Page program
DrvSPI_SingleWrite(eDRVSPI_PORT2, &au32SourceData);
while (DrvSPI_IsBusy(eDRVSPI_PORT2)) {} // wait
DrvSPI_SetBitLength(eDRVSPI_PORT2, 24); // configure transaction length as 24 bits
au32SourceData = StartAddress; // send 24-bit start address
DrvSPI_SingleWrite(eDRVSPI_PORT2, &au32SourceData);
while (DrvSPI_IsBusy(eDRVSPI_PORT2)) {} // wait
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Spiflash_PageProgram
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DrvSPI_SetBitLength(eDRVSPI_PORT2, 8); // configure transaction length as 8 bits
DrvSPI_SetPDMA(eDRVSPI_PORT2, eDRVSPI_TX_DMA, TRUE); // enable SPI PDMA
// SPI go
PDMA1_INT_Flag = 0;
DrvSPI_SetGo(eDRVSPI_PORT2);
// wait PDMA1 done
while (1)
{
if (PDMA1_INT_Flag)
{
PDMA1_INT_Flag = 0;
break;
}
}
DrvSPI_ClrSS(eDRVSPI_PORT2, eDRVSPI_SS0); // /CS: de-active
}
SPI Flash Page Erase
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SPI Flash Read Mid & Did
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SpiFlash_ReadMidDid
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// For W25Q16BV, Manufacturer ID: 0xEF; Device ID: 0x14
// For W26X16, Manufacturer ID: 0xEF; Device ID: 0x14
void SpiFlash_ReadMidDid(void)
{
uint32_t au32SourceData;
uint32_t au32DestinationData;
// configure transaction length as 8 bits
DrvSPI_SetBitLength(eDRVSPI_PORT2, 8);
DrvSPI_SetSS(eDRVSPI_PORT2, eDRVSPI_SS0); // /CS: active
// send Command: 0x90, Read Manufacturer/Device ID
au32SourceData = 0x90;
DrvSPI_SingleWrite(eDRVSPI_PORT2, &au32SourceData);
while (DrvSPI_IsBusy(eDRVSPI_PORT2)) {} // wait
// configure transaction length as 24 bits
DrvSPI_SetBitLength(eDRVSPI_PORT2, 24);
au32SourceData = 0x0; // send 24-bit '0', dummy
DrvSPI_SingleWrite(eDRVSPI_PORT2, &au32SourceData);
while (DrvSPI_IsBusy(eDRVSPI_PORT2)) {} // wait
// configure transaction length as 16 bits
DrvSPI_SetBitLength(eDRVSPI_PORT2, 16);
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SpiFlash_ReadMidDid
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// receive
au32SourceData = 0x0;
DrvSPI_SingleWrite(eDRVSPI_PORT2, &au32SourceData);
// wait
while (DrvSPI_IsBusy(eDRVSPI_PORT2)) {}
// /CS: de-active
DrvSPI_ClrSS(eDRVSPI_PORT2, eDRVSPI_SS0);
DrvSPI_DumpRxRegister(eDRVSPI_PORT2, &au32DestinationData, 1);
if ((au32DestinationData & 0xffff) == 0xEF14)
print_lcd(3,"MID & DID=0xEF14");
else
print_lcd(3,"MID & DID Error!");
}
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SPI Flash Read Status Register
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SpiFlash_ReadStatusReg2
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uint32_t SpiFlash_ReadStatusReg2(void)
{
uint32_t au32SourceData;
uint32_t au32DestinationData;
DrvSPI_SetBitLength(eDRVSPI_PORT2, 16);
DrvSPI_SetSS(eDRVSPI_PORT2, eDRVSPI_SS0);
au32SourceData = 0x3500;
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// configure transaction length as 16 bits
// /CS: active
// send Command: 0x35, Read status register 2
DrvSPI_SingleWrite(eDRVSPI_PORT2, &au32SourceData);
while (DrvSPI_IsBusy(eDRVSPI_PORT2)) {}
DrvSPI_ClrSS(eDRVSPI_PORT2, eDRVSPI_SS0);
// wait
// /CS: de-active
DrvSPI_DumpRxRegister(eDRVSPI_PORT2, &au32DestinationData, 1); // dump Rx register
return (au32DestinationData & 0xFF);
}
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