Transcript IEEE C802.16m-09/0668

Performance Comparison of PFBCH
IEEE 802.16 Presentation Submission Template (Rev. 9)
Document Number:
IEEE C80216m-09/0668
Date Submitted:
2009-03-08
Source:
Youngseob Lee, Jinyoung Chun, Sukwoo Lee, Bin-Chul Ihm
{ys_lee, jychun03, sugoo, bcihm}@lge.com
LG Electronics
Venue: IEEE 802.16m Session#60, Vancouver, Canada
Re: IEEE 802.16m-09/0012, “Call for Comments on Amendment Working Document”
Target topic: Uplink PHY Control Section
Base Contributions: N/A
Purpose:
To be discussed and adopted in TGm
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Performance Comparison of PFBCH
- LGE
- Intel
- Samsung
- ITRI
PFBCH, PedB 3km/h, LGE's Permutation, 4bits
0
10
Intel, 4bit
Samsung, 4bit
ITRI, 4bit
LG, 4bits
Block Error Rate
-1
10
-2
10
-3
10
-8
-6
-4
SNR
-2
0
PFBCH, PedB 3km/h, LGE's Permutation, 5bits
0
10
Intel, 5bit
Samsung, 5bit
ITRI, 5bit
LG, 5bits
Block Error Rate
-1
10
-2
10
-3
10
-8
-6
-4
SNR
-2
0
PFBCH, PedB 3km/h, LGE's Permutation, 6bits
0
10
Intel, 6bit
Samsung, 6bit
ITRI, 6bit
LG, 6bits
Block Error Rate
-1
10
-2
10
-3
10
-8
-6
-4
SNR
-2
0
0
PFBCH, VehA 120km/h, LGE's Permutation, 4bits
10
Intel, 4bit
Samsung, 4bit
ITRI, 4bit
LG, 4bits
Block Error Rate
-1
10
-2
10
-3
10
-8
-6
-4
SNR
-2
0
PFBCH, VehA 120km/h, LGE's Permutation, 5bits
0
10
Intel, 5bit
Samsung, 5bit
ITRI, 5bit
LG, 5bits
Block Error Rate
-1
10
-2
10
-3
10
-8
-6
-4
SNR
-2
0
PFBCH, VehA 120km/h, LGE's Permutation, 6bits
0
10
Intel, 6bit
Samsung, 6bit
ITRI, 6bit
LG, 6bits
Block Error Rate
-1
10
-2
10
-3
10
-8
-6
-4
SNR
-2
0
PFBCH, VehA 350km/h, LGE's Permutation, 4bits
0
10
Intel, 4bit
Samsung, 4bit
ITRI, 4bit
LG, 4bits
Block Error Rate
-1
10
-2
10
-3
10
-6
-4
-2
0
2
SNR
4
6
8
10
PFBCH, VehA 350km/h, LGE's Permutation, 5bits
0
10
Intel, 5bit
Samsung, 5bit
ITRI, 5bit
LG, 5bits
Block Error Rate
-1
10
-2
10
-3
10
-6
-4
-2
0
2
SNR
4
6
8
10
PFBCH, VehA 350km/h, LGE's Permutation, 6bits
0
10
Intel, 6bit
Samsung, 6bit
ITRI, 6bit
LG, 6bits
Block Error Rate
-1
10
-2
10
-3
10
-2
0
2
4
SNR
6
8
10
Summary
4-bit best
performance
5-bit best
performance
6-bit best
performance
PedB
3km/h
LGE, Intel, Samsung > ITRI
Same performance
Same performance
VehA
120km/h
LGE, Intel, Samsung > ITRI
Same performance
Same performance
VehA
350km/h
LGE > Intel ≈ Samsung >
ITRI
LGE > Samsung > Intel >
ITRI
LGE > Samsung > Intel >
ITRI
LGE’s design is recommended (performance, robustness)
Summary
LGE’s permutation scheme with each company’s sequences makes
it possible to meet 1% BLER performance
Conclusion
• Adopt LGE’s PFBCH proposal in C802.16m09/0387r1 for the amendment working draft
Appendix
- Simulation Assumptions
- Performance w/o LGE’s permutation for
other company’s proposal in VehA 350km/h
(based on C80216m-09_0387.doc)
Simulation Assumptions
Channel Bandwidth
10MHz
Sampling Factor
28/25
FFT Size
1024
Cyclic Prefix ratio
1/8
Channel Condition
PedB 3km/h, VehA 120km/h, VehA 350km/h
The number of Ant.
Tx: 1, Rx: 2
Modulation
BPSK
Tile Size
2×6
Block Size
3 Distributed FMT
Permutation
LGE’s scheme in C80216m-09_0387r1.doc
Coding Scheme
(Sequence)
LGE, Intel, Samsung, ITRI: C80216m-09_0387r1.doc
Detection
Non-coherent detection, MLD
*Primary FBCH - VehA 350km/h
PFBCH, VehA 350km/h, 4bits
PFBCH, VehA 350km/h, 5bits
0
0
10
10
Intel, 4bit
Samsung, 4bit
LG, 4bits
Intel, 5bit
Samsung, 5bit
LG, 5bits
-1
Block Error Rate
Block Error Rate
-1
10
-2
10
-3
10
-2
10
-3
10
10
-6
-4
-2
0
2
4
6
8
10
SNR
-6
-4
-2
0
2
4
6
8
10
SNR
PFBCH, VehA 350km/h, 6bits
0
10
Intel, 6bit
Samsung, 6bit
LG, 6bits
Block Error Rate
-1
10
-2
10
-3
10
-2
0
2
4
SNR
*: Based on C80216m-09_0387.doc
6
8
10
• 4bit: Samsung can’t meet 1% BLER
w/o LGE’s permutation
• 5/6bit: Intel/Samsung can’t meet 1%
BLER w/o LGE’s permutation
• Overall: Only LGE’s permutation
makes it possible to meet 1% BLER