Transcript Document 7856612

Instruction Storage and Usage
• Instructions are stored in a memory called instruction memory
• To execute each instruction, we get the instruction out of
memory, store in a register called instruction register (may be
more than one single register of n-bits depending on the number
of words in an instruction), and carry out operations on data path
to achieve the desired result
• It may take more than one cycle to execute an instruction
• Each cycle is called phase (or state) in instruction execution
• Actions in one cycle is stored in one nano-instruction
• For each instruction (micro-instruction per book), multiple nano
instructions, one for each phase, are stored in nano_inst_mem
• Instructions are fetched one at a time pointed by a counter,
called program counter
• For each instruction, nano instructions are fetched from nano
memory, using a counter called nano-program counter
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Adding Program Memory
WR
Cond
Code
WA
WNAD
Input
Output
WOUT
EI
EALU
WIAD
Reg
File
S
H
I
F
T
A
L
U
NAddr
Inst
Mem INST
OpCode
MReg
NPC
IAddr
RA2
INAD
PC
RA1
EMR
Nano
Inst
Mem
IIAD
• Program memory has
Control
– A PC
– Memory
– Mechanism to change PC
WM
Mem RM
Data
Unit
Addr
SC
EM
WDAD
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Adding Conditional Branches
Nano
Inst
Control Mem
INAD
OpCode
Reg
File
WR
S
H
I
F
T
A
L
U
Cond
Code
WA
Output
Input
WOUT
EI
EALU
SC
EM
WM
Mem RM
Data
Unit
Addr
WDAD
IIAD
RA2
EMR
Inst
Mem INST
RA1
MReg
IAddr PC
WIAD
• ALU generate status bits like
NPC
NAddr
– carry, overflow, sign, and zero
WNAD
– zero=1 means result from ALU is zero
• These bits can be used to change flow of program
– A new address is generated using CCs
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Conditional Branch Instruction
Reg
File
WR
S
H
I
F
T
A
L
U
Cond
Code
WA
WNAD
Output
Input
WOUT
EI
EALU
SC
EM
WM
Mem RM
Data
Unit
Addr
WDAD
IIAD
OpCode
NAddr
Inst
Mem INST
RA2
EMR
NPC
IAddr PC
RA1
MReg
INAD
WIAD
• Program change flow
• For example
– If.. Then… Else
• Condition codes determine flow
• PC is changed
Nano
Inst
Control Mem
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