Transcript 6.376 Final Project: Low-Power CMOS Measurement System for Chemical Sensors Stuart Laval

6.376 Final Project:
Low-Power CMOS Measurement
System for Chemical Sensors
Stuart Laval
December 8, 2003
Outline
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Project Goal
Total Chip Schematic
Op-Amp/Comparator
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Transfer Characteristics
Step Response
Output Characteristics
Specifications
Chip Layout
Project Goal
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Design a low-power chip for measuring the resistive
change in a chemical sensor.
Wheatstone Bridge
 Null-detector
 Immune to Power Supply variations
Sensor Characteristics
 Nominal Resistance ~ 100K Ohms
 Maximum change ~ 1K Ohms
 Target resolution ~ 100 Ohms (0.1%)
System Requirements
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Power < 20 mW
Vdd = 3 V
Voltage change resolution ~ 0.75 mV
Gain > 4000 (72 dB)
Total Chip Schematic
Auto-zero circuit nullifies input offset error
R=100k
R=100k
Clk = 1, Switch closed, V- stored on cap
Clk = 0, Switch open, V+ compared to ref
clk
VV+
C=10pF
+
Op-Amp
-
LEDs
R=100K+r
11 resistors
reset
Shift Registers
R=100k
Logic
V- V+
LEDs indicate the
number of 100 Ohm
level changes.
Op-Amp / Comparator
Ibias = 1nA
Ibias
M=2
V-
M=2
W='25*l'
L='20*l'
W='80*l'
L='20*l'
M=2
W='20*l' W='20*l'
L='20*l' L='20*l'
V+
cap_switch
W='25*l'
L='20*l'
M=2
C=3pF
M=2
Vout
L='20*l'
W='20*l'
W='30*l'
W='20*l'
L='20*l'
L='20*l'
Gain Bandwidth
Op-Amp
Comparator
100
Gain ~ 70000 (97 dB)
Comparator GB ~ 40 KHz
Magnitude (dB)
80
Op-amp GB ~ 750 Hz
Phase Margin ~ 60°
60
20 dB/dec
40
20
40 dB/dec
0
0.001
-20
0.01
0.1
1
10
100
Frequency (Hz)
1000
10000
100000
Settling time
Step Response
1.5
Settling Time ~ 8 ms
Voltage (V)
1.25
1.51
1
1.5
1.49
0.75
1.48
1.47
1.46
0.5
1.45
0.0049
0.25
0
0
0.002
0.004
0.006
Time (sec)
0.008
0.01
Sample Output Characteristics
R + ∆R = 100.6K Ohms
3
V(out 0)
2.5
Voltage (V)
V(out 1)
V(out 2)
2
V(out 3)
V(out 4)
1.5
V(out 5)
V(out 6)
V(out 7)
1
V(out 8)
V(out 9)
0.5
V(out 10)
0
0
0.01
0.02
0.03
Time (seconds)
0.04
Specifications
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Ibias = 1 nA
Gain ~ 97 dB
Bandwidth ~ 750 Hz
Settling Time ~ 8 ms
Analog Power = 10.1 nW
Total Power = 125 uW
Total Noise = 80 nV
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Ibias = 40 nA
Gain ~ 97.3 dB
Bandwidth ~ 27 KHz
Settling Time ~ 350 ms
Analog Power = 391 nW
Total Power = 125 uW
Total Noise = 82 nV
Chip Layout (40 nA Iref)
Op-Amp in Common Centroid
Total Chip Layout
Questions