Transcript Basic Amplifiers and Differential Amplifier
CSE598A/EE597G Spring 2006
Basic Amplifiers and Differential Amplifier
Insoo Kim, Kyusun Choi
Mixed Signal CHIP Design Lab.
Department of Computer Science & Engineering The Penn State University
Don’t let the computer think for you
In today’s analog design, simulation of circuits is essential because the behavior of short-channel MOSFETs cannot be predicted accurately by hand calculations. Nonetheless, if the designer avoids a simple and intuitive analysis of the circuits and hence skips the task of gaining insight, then he/she cannot interpret the simulation results intelligently. For this reason, we say,
“Don’t let the computer think for you.”
- Behzad Razavi Insoo Kim 4/29/2020
Contents
Fundamentals Basic Amplifiers: Low Frequency Analysis Basic Amplifiers: High Frequency Analysis Differential Amplifier Feedback 4/29/2020 Insoo Kim
Fundamentals
Definitions DC Operating Point & Load line Large Signal Analysis vs. Small Signal Analysis MOSFET intrinsic Capacitances
Definitions
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DC Operating Point & Load Line
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Large Signal Analysis vs. Small Signal Analysis
Large Signal Analysis Insoo Kim 4/29/2020
Large Signal Analysis vs. Small Signal Analysis
Small Signal Analysis How convenient !! Insoo Kim 4/29/2020
MOSFET Intrinsic Capacitances
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(cont’d) MOSFET Intrinsic Capacitances
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Basic Amplifiers: Low Frequency Analysis
Single Stage Amplifiers Multi Stage Amplifiers
Single Stage Amplifiers: CS, CD, and CG Stage
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Common Source Stage : Voltage Gain
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Common Drain Stage: Output Resistance
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Common Gate Stage : Input Resistance
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Summary
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Quiz
CD stage amplifier is suitable for output stage of OPAmp due to its low output impedance and large bandwidth. However, in CMOS analog IC, CS stage is more widely used for output stage OPAmp than CD stage. Why?
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Loads for basic amplifiers
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(cont’d) Loads for basic amplifiers
Diode Connected Load
V X I X
g m
1
g mb
r o
1
g m
1
g mb
||
r o
g m
1
g mb
1
g m R X A v
g m
1 1
g m
2 (
W
/
L
) 1 (
W
/
L
) 2 4/29/2020 Insoo Kim
(cont’d) Loads for basic amplifiers
Source degeneration
G m
1
g m g m R S R out
r R S o
[( [
R S g m
2 (
g
m
2
g mb
2 )
r o
g mb
2 ) 1 ] 1 ]
r o
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Cascode Stage
Small Signal Analysis Rout 4/29/2020
V out A v
(
R g m
1
out
( ||
R R out D
|| )
R g D m
1 )
V in R out
r o
1
r o
2 [(
g m
2 [
r o
1
g
(
g m
2
mb
2
g
)
r o
2
mb
2 ) 1 ] 1 ]
r o
2 Insoo Kim
Folded Cascode Stage
A g m1 R o R o D R o2C 1 g / m2C C L || R r o2C R o o4C r o2 t A D || g m1 /C L r o7 SR 2I/C L g m4C r o4C r o3 Insoo Kim 4/29/2020
(cont’d) Folded Cascode Stage
What are the advantages of folded cascode amplifier?
Disadvantages: Limited Output swing Large Voltage Headroom Large Power Consumption 4/29/2020 Insoo Kim
Basic Amplifiers: High Frequency Analysis
Frequency Analysis Dominant Pole Approach
Frequency Analysis
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(cont’d) Frequency Analysis
Bode Plot 4/29/2020 Insoo Kim
Dominant Pole Approach
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BW Estimation by Dominant Pole Approach
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Bandwidth Comparison
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Quiz
Design an amplifier which satisfy following features using basic single-stage amplifiers.
High gain Large Bandwidth High input impedance Low output impedance Insoo Kim 4/29/2020
Differential Amplifier
Single Stage Amplifiers Multi Stage Amplifiers
Why differential Amplifier?
Single Ended Signal can be easily contaminated A Differential Signal can be cleaned up Power Supply noise can be reduced 4/29/2020 Insoo Kim
Differential Amplifier Analysis
Classic Diff Amp 4/29/2020 Insoo Kim
(cont’d) Differential Amplifier Analysis
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Diff Amp with Current Mirror Load
G m
g m
2 , 4
R out A v
r o
2
g m
2 , 4 ||
r o
4 (
r o
2 ||
r o
4 )
CMRR
( 2
g m
1
r o
5 )
g m
3 (
r o
1 ||
r o
3 )
CMRR
(
R load
)
g m
3 (
r o
1 ||
r o
3 ) Common Mode Input Voltage Range V SS +V TN1 +V DSAT5 +V DSAT1 < V IC < V DD –|V DSAT3 |–|V TP3 |+| V TN1 | 4/29/2020 1. What is CM Input Voltage?
2. How do we prove this equation?
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(Std. Library) Design Exercise
Design Flow Determine Specifications Power Consumption (ex. 1mW) Voltage Gain (ex. >30) Active Common Mode Input range (as large as possible) Others: slew rate, CMRR, PSRR, etc.
Determine minimum channel length Determine channel width Determine W 1,2 from voltage gain spec.
Determine W 5 & Bias Voltage from power consumption & CM min.
Determine W 3,4 from CM max.
Determine Bias Level of current source tr.
Check other specifications Insoo Kim 4/29/2020
Feedback
Feedback & Stability Voltage Amplifier Model Common Mode Feedback
Feedback & Stability
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Voltage Amplifier Model
Models 4/29/2020 Insoo Kim
(cont’d) Voltage Amplifier Model
1 st Order Model 4/29/2020 Insoo Kim
(cont’d) Voltage Amplifier Model
2 nd Order Model 4/29/2020 Insoo Kim
(cont’d) Voltage Amplifier Model
Time Response of the 2 nd Order Model 4/29/2020 Insoo Kim
(cont’d) Voltage Amplifier Model
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Feedback Characteristics
Gain desensitization A f x o x s 1 A A
d
A f (1
d
A A) 2
d
A f A f 1 1 A
d
A A Band width extension A(s) 1 A s/ M H A f ( s ) 1 A(s) A(s) 1 A M s / /( 1 H ( 1 A M A ) M ) Noise Reduction S N V V n s V o V s 1 A 1 A A 1 2 A 2 V n 1 A 1 A 1 A 2 S N V V n s A 2 Non-linearity Reduction (a) w/o feedback (b) w feedback Insoo Kim 4/29/2020
Common Mode Feedback
Why is CMFB circuit needed? Due to TR mismatch, TRs may not be in saturation region at operating point. DM Gain decreases and CM gain increases Since output CM level is sensitive to device properties and mismatches, it cannot be stabilized by means of differential feedback.
General Topology of CMFB Circuit Insoo Kim 4/29/2020
(cont’d) Common Mode Feedback
Examples of CMFB Folded cascode amplifier with CMFB 4/29/2020 Useful for low gain applications
A v
g m
1 , 2 (
r O
1 , 2 ||
r O
3 , 4 ||
R F
) Insoo Kim
References
Joongho Choi, “CMOS analog IC Design,” IDEC Lecture Note, Mar. 1999.
B. Razavi, “Design of Analog CMOS Integrated Circuits,” McGraw-Hill, 2001.
Hongjun Park, “CMOS Analog Integrated Circuits Design,” Sigma Press, 1999. Insoo Kim 4/29/2020