General Fixed Radix Number Systems
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Transcript General Fixed Radix Number Systems
General Fixed Radix Number Systems
• Nonredundant
• Positive radix, ß
• n digits in digit set
• Vector: ( ,
n 1
n 2
,
, 0 )
i {1,1}
n 1
X i xi i
i 0
wi i i
i allows i or i
General Fixed Radix Number Systems
• For Given Radix and n, how many number systems?
• ANSWER: Number equal to all possible permutations
of n choose –1 (or +1),
Positive Radix
Choose -1
n n n
0 1 2
n
n
n
2n
i 0 i
n
• Of these, 1 is Pos. Radix 1 is Neg. Radix
• The following is the Radix-complement:
( 1,1,1,1, ,1,1)
Negative Radix
General FR Number Systems - Properties
P Largest Representable Integer
N Smallest Representable Integer
P ( pn 1 pn 2
p0 )
1,
pi
0 ,
pi are Digits of P
if i 1
otherwise
1
pi ( i 1)( 1)
2
General FR Number Systems - Properties
Using the pi Expression and Forming the Radix Polynomial for P
n 1
1
1 n 1
i
i
i
P (i 1)( 1) i ( 1) ( 1)
2 i 0
i 0 2
i 0
n 1
digit
Define as Q
weight
n 1
n 1
1
1
i
i 1
i
Q ( 1) Q ( )
2
i 0
i 0
2
n 1
1
P Q ( n 1)
2
General FR Number Systems - Properties
Q is the value represented by the following n-tuple if all i=1
( 1, 1, 1,
, 1)
For N, the Smallest Representable Value:
N ( yn 1 yn 2
1,
yi
0 ,
y1 y0 )
if i 1
otherwise
1
yi ( i 1)( 1)
2
General FR Number Systems - Properties
Using Similar Analysis as With the Case of P:
n 1
1
1 n 1
i
i
i
N (i 1)( 1) i ( 1) ( 1)
2 i 0
i 0 2
i 0
n 1
digit
Define as Q
weight
n 1
n 1
1
1
i
i 1
i
Q ( 1) Q ( )
2
i 0
i 0
2
n 1
1
N Q ( n 1)
2
General FR Number Systems –Symmetry
Summarizing:
NX P
Where
P N 1 n
• In General These Bounds are Asymmetric
• Measure of Asymmetry is:
P | N | P N Q
• Therefore, Q is a Measure of Asymmetry for Generalized
Fixed Radix Number Systems
GFRNS – Asymmetry Examples
Consider the Negative Radix System:
( , 1, 1, 1, 1, )
Asymmetric Range:
n even times as many negative as positive values
n odd times as many positive as negative values
2’s Complement:
2
( 1, 1, 1, 1,
P | N | P N Q ulp
, 1)
(1 more negative number)
System:
2
( 1, 1, 1, 1,
P | N | P N Q ulp
, 1)
(1 more positive number)
GFRNS – Complement
Recall that a complement of a digit, xi, is:
xi ( 1) xi
The Complement of a Value, X, is Calculated as:
n 1
n 1
n 1
i 0
i 0
i 0
X xi i i i ( 1) i xi i i
Q
X Q X
Thus,
X X Q X ( Q )
X
Signed-Digit Number Systems
• Fixed radix (positional)
• Allows each digit to carry a sign
example
xi { 1, 2,....,1,0,1,...., 1}
i i
This signed digit (SD)
is a new definition of the digit complement
Signed-Digit Example
10
xi {9,8,....,1,0,1,....,8,9}
for a total of 19 possible digits
If n = 2
X min 99, X max 99
X [99,99]
ulp 1
199 values, however there are 192 =
361 representations possible which
implies this is a redundant number
system
Signed-Digit Example - Redundancy
xi {9,8,....,1,0,1,....,8,9}
For n = 2, range is
19 possible digits
X [99,99]
199 values and 192 = 361 representations implies redundancy
% redundancy
361 199
81.4%
199
Redundancy Index, = + + 1 – r for digit set is [- ,
]
Here, = 9 + 9 + 1 – 10 = 9, but if = 0 & =9, then = 0.
Example redundant representation:
xi (12) (08) (8)10
Restricting Redundancy
xi {a, a 1,
,1, 0,1 , a}
where
r 1
2 a r 1, 5 a 9 (r 10)
Let a 6
Range of 66 x 66 includes 133 numbers
(13) 2 169 representations
(12) 8 unique
169 133
% redundancy
27%, 6 6 1 10 3
133
Signed-Digit Characteristics
• Positive radix, ß > 0
• X = 0 is unique
• Easy to convert
• Constant Delay for Add/Sub Regardless of Word Size
Breaking the Carry Chain Using SD
Can make sum only a function of two digit positions
si f ( xi , yi , xi 1 , yi 1 )
Carry-Free Addition Algorithm
Step 1: Find interim sum wi and transfer digit ti+1 where
wi xi yi rti 1
and
positional sum pi
1 if ( xi yi ) a
ti 1 1 if ( xi yi ) a
0 if x y ) a
i
i i
Step 2: Find final sum si
si wi ti note : t0 0
Signed Digit Addition Hardware
xi 1
yi 1
xi
yi
xi 1
yi 1
ti 2
wi 1
ti 1
wi
ti
wi 1
ti 2
si 1
si
si 1
SD Addition Example
Let a = 6 for r = 10
xi {6, 5, , 1, 0,1, ,5, 6}
wi ( xi yi ) 10ti 1
1 if ( xi yi ) 6
ti 1 1 if ( xi yi ) 6
0 otherwise
si wi ti
SD Addition Example (Continued)
Let X = 1634, Y = 3366
Using normal addition produces a carry chain
X
1 1 1
1 6 3 4
Y
3 3 6 6
5 0 0 0
But by the carry-free algorithm
X
Y
1 6 3 4
3 3 6 6
0 1 1 1 0
ti
4 1 1 0
5 0 0 0
wi
si
Converting Decimal to SD
Let r = 10, a = 6
Consider the value as xi + yi and use algorithm
xi yi
1 8 2 6
ti
0 1 0
1
0
wi
1 2
2
4
2
3
4
si
2
Converting from SD to decimal – just sum plus and
minus weights
2030 – 204 = 1826
Selecting a to Eliminate Carry Chain in SD
For no carry, require
si {a, a 1,
,1, 0,1,
, a 1, a}
si wi ti a
worst case ti 1 restricting
wi a 1 equation (1)
must be true for all xi , yi where ti 1
Selecting a to Eliminate Carry Chain in SD
Case 1: xi yi 2a
wi (2a) r (1) 2a r
By (1)
2a r a 1 or
a r 1 (upper bound )
Case 2 : xi yi a
wi (a ) r (1) a r 0
wi r a
By (1)
r a a 1
2a r 1
or
r 1
2 a (lower bound )
r 1
a r 1
2
Binary SD Addition
For r 2 , a 1,
(only one digit set , 1,0,1)
r 1
r 1 a
2 impossible for digit set !
2
Implies no guarantee that si = wi + ti will not produce a carry
Looking at algorithm:
Step 1:
wi ( xi yi ) 2ti 1
ti 1
1 if
1 if
0 if
xi yi 1
xi yi 1
xi yi 0
Unmodified Binary SD Addition Table
Step 2:
si wi ti Based on calculation of wi and ti+1
xi,yi
00
01
01
11
11
11
ti+1
0
1
1
1
1
0
wi
0
1
1
0
0
0
0 1
1
1
0 1 0 1
Note: redundancy allows choices for wi and ti+1
How Useful is Unmodified Table?
Works if operands do not contain 1
If operands contain only 0’s and 1’s, no carry generated.
si wi ti
0 or 1 0 or 1
Example
1 1 .... 1 1 1
0 0 .... 0 0 1
1 1 1 .... 1 1
ti
1 1 .... 1 1 0 wi
1 0 0 .... 0 0 0 si
Why not use this approach to break carry chain
for unsigned binary number?
Limitations of Table
Does not work if operands contain 1
If wi 1 xi yi 0 1
and ti 1 xi 1 yi 1 01, 11
si has carry.
Example (-9)10 + (29)10
0 1 1 1 1 1
1 0 0 1 0 1
1 1 1 1 1 1
ti
1 1 1 0 1 0 wi
* * * * 1 0 0 si
carries
SD Addition Table Choices
Takagi, 1985
xi
yi
1
0
1
1
0
10
11
01
00
00
01
11
11
01
00
01
11
1
10
xi1 or yi1 1
ti wi
ti wi
xi1 or yi1 0,1
Modified Binary SD Addition Table
xi,yi
xi-1,yi-1
00,11
-
01
01
neither is at least
1
one is
01
01
neither is at least
one is
1
11 11
-
-
1
1
ti+1
0
1
0
0
1
1
1
wi
0
1
1
1
1
0
0
Repeating Example with Modified Table
Example (-9)10 + (29)10
0 1 1 1 1 1
0
1 0 0 1 0 1
0 0 1 1 1
ti
1 1 1 0 1 0 wi
1 1 0 1 0 0 si
no carries
Two SD Encodings
4!=24 possible encodings
Only nine are distinct under permutation and logical
negation
two’s complement
x
Encoding 1 Encoding 2
xh xl
xh xl
0
1
00
01
00
01
1
10
11
Encoding 1
Satisfies simple relation
x = xl - xh
and 11 has a valid numerical value of 0.
SD to two’s complement conversion performed by
two’s complement subtraction
l
n 1
x
x
h
n 1
l
n2
,x
h
n2
,x
,
,
l
0
,x
h
0
,x
Encoding 2
Satisfies relation
xi = -2xih + xil
This means that xil and xi-1h have the same weight
Also simplified addition table possible by regrouping
bits
xil , and xih1 , can be regrouped to form xˆi
Two’s Complement/BSD Conversion
Two’s Complement to SD
Bits can be encoded directly with MSB negative one
BSD to Two’s Complement
One algorithm simpler than complete binary adder
zi is two’s complement result
c0 = 0
y c z 2c
i
yi
0
ci
0
zi
0
ci 1
0
0
1
1
1
1
1
0
1
0
1
1
1
0
1
0
1
0
0
1
1
i
i 1
i
Example -1010
yi
ci
zi
0 1 0 1 0
1 1 1 1 0 0
1 0 1 1 0
Binary SD Representations
Representation of a value with the minimum number of
non-zero digits – Important in multiplication and
division since each zero eliminates an operation
X = 5, n = 4, r = 2
Minimal SD
representation of X = 5
8 4 2 1
0 1 0 1
1 0 1 1
0 1 1 1
1
1 0 1
1
1 1 1
.
Alternate Class of BSD Addition Tables*
Motivation: Previous tables based on calculation of si wi ti
where wi and ti require 2-bit encoding
xi,yi
00
01
01
11
11
11
ti+1
0
1
1
1
1
0
wi
0
1
1
0
0
0
Alternative
restricts these
values to
{0,1} or {1,0}
Note: In the discussion ci will be used in place of ti and ui for wi
*see M. Thornton, A Signed Binary Addition Circuit Based on an Alternative Class of Addition Tables
Basic Idea for Alternate SBD
Representation
• Restrict
ci 0,1
ui 1,0
or
ci 1,0
ui 0,1
where
xi yi ui 2(ci 1 bi 1 ) bi
si ui ci
xi yi 2, 1,0,1,2
• Add 2bi+1 since it is “borrowed” from i+1 column
• Subtract bi since it is “borrowed” from i-1 column
Basic SD Addition Tables
xi yi si
xi
yi
1
0
1
1
2
1
0
0
1
0
1
0
1
xi
yi
xi yi ui 2ci1
1
0
1
1
10
01
00
1
0
01
00
01
2
1
00
01
10
Both have inherent propagation limitations
0 1
1 1
1 0
0 1
0 * 0
Alternative 1 BSD Addition Table*
yi
xi
1
0
1
1
1
1
1
0
1
01
00
11
00
00
11
11
10
1
0
0
11
01
00
00
11
1
0
0
bi=1
bi+1
10
ci+1 ui
ci+1 ui
00
11
11
10
ci 0,1
ui 1,0
xi yi 1 1 2
ui 2(ci 1 bi 1 ) bi
1 2 1 2
* Table 2 of Thornton paper
bi=0
bi 1,0
Alternative 2 BSD Addition Table*
yi
xi
1
0
1
0
0
1
0
1
10
11
10
11
11
00
0
0
10
1
00
00
01
1
11
1
11
1
bi=0
bi+1
11
11
ci 1,0
ci+1 ui
ci+1 ui
ui 0,1
bi=1
bi 0,1
00
00
1
00
* Table 4 of Thornton paper
01
X
0 1 0 1 1 1 0 0
Y
B
U
0 0 1 1 0 1 0 1
1 0 0 0 1 0 0
1 1 1 0 0 0 0 1
C 0 1 1 1 0 0 0 1
S 0 0 0 0 0 0 0 1 1
Signed Binary Addition Hardware Using
Intermediate Borrow and Carry
1
bi 2
2
xi 1
2
1ci 2
2
2
y i 1
1u
i 1
1
2
2
2
xi 2
si 1
1c
i
1
2
yi
1u
1
i
2
2
si
2
xi 1 2
1c
i
2
yi 1
1u
1
i 1
2
2
xi 2 2
xi 2
2
yi 2
yi 2
Encoding Scheme For Even Parity*
• Single bit error coverage over digit pairs
• Choose 1 00
0 01 or 11
1 10
• Then each successive pair of signed binary digits can
be grouped with even parity
value pair
3 11
encoding
0000
2 10
0011
1 01
1100
0 00 0101 or 1111
1 01
2 10
0110
1001
3 11
1010
*see M. Thornton, Signed Binary
Addition Circuitry with Inherent Even
Parity Outputs