Transcript lecture01
Digital Systems
Tinoosh Mohsenin
CMPE 650
Spring 2013
Today
Administrative items
Syllabus and course overview
Digital systems and optimization
overview
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Course Communication
Email
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Web page
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Urgent announcements
http://www.csee.umbc.edu/~tinoosh/cmpe650/
Office hours
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By appointment
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Course Description
This course focuses on
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Advanced topics for a complete digital system
design
Advanced topics in logic design
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Fixedpoint arithmetic
Pipelining
Memory system design
Timing Analysis
Low power design
FPGA implementation and its features
Evaluation of the system on FPGA
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Course Description
Computer Aided Design of
large/complex digital system
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Verilog
Xilinx ISE flow
─ Simulation (isim)
─ Synthesis and place & route
FPGA verification
─ Virtex 5
Prerequisite
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CMPE 415
CMPE 310
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Course Description
Lectures
Handouts
Homework/ projects
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Midterm Exam
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End of March (or early April)
Final Project and Presentation (or Final exam)
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Three/four HWs
A simple communication system design and optimization.
Active participation (5% of your grade)
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Lectures
Ask questions at any time
Participate in the class (%5 of your grade)
Silence phones
Hold conversations outside of class
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Advanced FPGA Design
FPGA: Field Programmable Gate Arrays
Advanced: Basic knowledge of FPGA
and verilog coding
Design: meeting functional requirements
while satisfying performance, delay,
power and cost budgets
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Trends in Cellphone Chip Integration
1993
iPhone 3GS
Chip integration is increasing every generation
Cell phone size is decreasing
Users want more features every generation
Power budget is very limited
Y. Neuvo, ISSCC 2004
Cellphone Architecture Example
Integrated
Transceiver
Cellphone chips have multiple processing cores and
support multiple applications and features
Ex: Integrated Transceiver: WiFi (802.11a/b/g), Bluetooth, FM
www.phonewreck.com, 10
C.H. Van Berkel, DATE 2009
Digital Systems
Electronic circuits that use discrete
representations of information
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Discrete time and values
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Digital Processing vs Analog Processing
Digital arithmetic is completely stable over process,
temperature, and voltage variations
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Ex: 2.0000 + 3.0000 = 5.0000 will always be true as long as the circuit
is functioning correctly
Digital design energy‐efficiencies are rapidly increasing
Once a digital processor has been designed in a portable format
(gate netlist, HDL, software), very little effort is required to “port”
(re‐target) the design to a different processing technology.
Analog circuits typically require a nearly‐complete re‐design.
Digital circuit capabilities are rapidly increasing
Analog A/D speed x resolution product doubles every 5 years
Digital processing performance doubles every 18‐24 Months (6x
to 10x every 5 years
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Common DSP Applications
Early applications
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Instrumentation
Radar
Imaging
Current applications
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Audio, video
Networking
Telecommunications
Biomedical application
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Common Trends
Analog based →Digital based
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Music: records, tapes → CDs
Video: VHS, 8mm → DVD, Blu‐ray
Telephony, cell phones: analog (1G) → digital (2G, 3G, 4G, …)
Television: NTSC → digital (DVB, ATSC, ISDB, …)
Many new things use digital data and “speak” digital: computers,
networks, digital appliances
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Basic Digital Circuit Components
Primitive components for logic design
AND gate
OR gate
0
1
inverter
multiplexer
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Sequential Circuits
Circuit whose output values depend on
current and previous input values
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Include some form of storage of values
Nearly all digital systems are sequential
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Mixture of gates and storage components
Combinational parts transform inputs and
stored values
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Flipflops and Clocks
Edge-triggered D-flipflop
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D
stores one bit of information at a time
Q
clk
Timing diagram
Graph of signal values versus time
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Hierarchical Design
Architecture
Design
Unit
Design
Design
Unit
Verification
Functional
Verification
OK?
N
Y
OK?
Y
Integration
Verification
N
N
OK?
Y
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What we learn by the end of semester
Processor building blocks
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Binary number representations
Types of Adders
Multipliers
Complex arithmetic hardware
Memories
Communication algorithms and systems
Design optimization targeted for FPGA
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Verilog synthesis to a gate netlist
Delay estimation and reduction
Area estimation and reduction
Power estimation and reduction
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A Simple Design Methodology
Requirements
and
Constraints
Design
Synthesize
Physical
Implementation
Manufacture
Functional
Verification
Post-synthesis
Verification
Physical
Verification
Test
OK?
N
Y
OK?
N
Y
OK?
Y
N
Digital Design — Chapter 1 — Introduction and
Methodology
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Hierarchical Design
Circuits are too complex for us to design
all the detail at once
Design subsystems for simple functions
Compose subsystems to form the
system
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Treating subcircuits as “black box”
components
Verify independently, then verify the
composition
Top-down/bottom-up design
Digital Design — Chapter 1 — Introduction and
Methodology
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Synthesis
We usually design using register-transferlevel (RTL) Verilog
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Synthesis tool translates to a circuit of gates
that performs the same function
Specify to the tool
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Higher level of abstraction than gates
the target implementation fabric
constraints on timing, area, etc.
Post-synthesis verification
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synthesized circuit meets constraints
Digital Design — Chapter 1 — Introduction and
Methodology
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Physical Implementation
Implementation fabrics
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Application-specific ICs (ASICs)
Field-programmable gate arrays (FPGAs)
Floor-planning: arranging the subsystems
Placement: arranging the gates within
subsystems
Routing: joining the gates with wires
Physical verification
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physical circuit still meets constraints
use better estimates of delays
Digital Design — Chapter 1 — Introduction and
Methodology
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Codesign Methodology
Requirements
and
Constraints
Partitioning
Hardware
Requirements
and Constraints
Software
Requirements
and Constraints
Hardware
Design and
Verification
Software
Design and
Verification
N
OK?
OK?
N
Manufacture
and Test
Digital Design — Chapter 1 — Introduction and
Methodology
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Summary
Digital systems use discrete (binary)
representations of information
Basic components: gates and flipflops
Combinational and sequential circuits
Real-world constraints
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logic levels, loads, timing, area, etc
Verilog models: structural, behavioral
Design methodology
Digital Design — Chapter 1 — Introduction and
Methodology
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Integrated Circuits (ICs)
Circuits formed on surface of silicon wafer
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Minimum feature size reduced in each
technology generation
Currently 90nm, 65nm
Moore’s Law: increasing transistor count
CMOS: complementary MOSFET circuits
+V
input
Digital Design — Chapter 1 — Introduction and
Methodology
output
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Logic Levels
Actual voltages for “low” and “high”
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Example: 1.4V threshold for inputs
Digital Design — Chapter 1 — Introduction and
Methodology
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Logic Levels
TTL logic levels with noise margins
VOL: output low voltage
VOH: output high voltage
VIL: input low voltage
VIH: input high voltage
Digital Design — Chapter 1 — Introduction and
Methodology
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Static Load and Fanout
Current flowing into or out of an output
High: SW1 closed, SW0 open
Low: SW0 closed, SW1 open
Voltage drop across R1
Too much current: VO < VOH
Voltage drop across R0
Too much current: VO > VOL
Fanout: number of inputs
connected to an output
determines static load
Digital Design — Chapter 1 — Introduction and
Methodology
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Capacitive Load and Prop Delay
Inputs and wires act as capacitors
tr: rise time
tf: fall time
tpd: propagation delay
delay from input transition
to output transition
Digital Design — Chapter 1 — Introduction and
Methodology
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Other Constraints
Wire delay: delay for transition to
traverse interconnecting wire
Flipflop timing
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delay from clk edge to Q output
D stable before and after clk edge
Power
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current through resistance => heat
must be dissipated, or circuit cooks!
Digital Design — Chapter 1 — Introduction and
Methodology
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Area and Packaging
Circuits implemented on silicon chips
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Chips in packages with connecting
wires
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Larger circuit area => greater cost
More wires => greater cost
Package dissipates heat
Packages interconnected on
a printed circuit board (PCB)
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Size, shape, cooling, etc,
constrained
by final
product
Digital Design
— Chapter
1 — Introduction and
Methodology
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Models
Abstract representations of aspects of a
system being designed
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Allow us to analyze the system before
building it
Example: Ohm’s Law
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V=I×R
Represents electrical aspects of a resistor
Expressed as a mathematical equation
Ignores thermal, mechanical, materials
aspects
Digital Design — Chapter 1 — Introduction and
Methodology
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Verilog
Hardware Description Language
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A computer language for modeling
behavior and structure of digital systems
Electronic Design Automation (EDA)
using Verilog
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Design entry: alternative to schematics
Verification: simulation, proof of properties
Synthesis: automatic generation of circuits
Digital Design — Chapter 1 — Introduction and
Methodology
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Module Ports
Describe input and outputs of a circuit
>30°C
>25°C
low level
above_30_0
above_25_0
temp_bad_0
or_0a
inv_0
or_0b
wake_up_0
below_25_0
low_level_0
select_mux
0
>30°C
>25°C
1
above_30_1
above_25_1
buzzer
buzzer
temp_bad_1
inv_1
or_1a
or_1b
+V
wake_up_1
select_vat_1
below_25_1
low level
low_level_1
Digital Design — Chapter 1 — Introduction and
Methodology
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Structural Module Definition
module vat_buzzer_struct
( output buzzer,
input above_25_0, above_30_0, low_level_0,
input above_25_1, above_30_1, low_level_1,
input select_vat_1 );
wire below_25_0, temp_bad_0, wake_up_0;
wire below_25_1, temp_bad_1, wake_up_1;
// components for vat 0
not inv_0 (below_25_0, above_25_0);
or or_0a (temp_bad_0, above_30_0, below_25_0);
or or_0b (wake_up_0, temp_bad_0, low_level_0);
// components for vat 1
not inv_1 (below_25_1, above_25_1);
or or_1a (temp_bad_1, above_30_1, below_25_1);
or or_1b (wake_up_1, temp_bad_1, low_level_1);
mux2 select_mux (buzzer, select_vat_1, wake_up_0, wake_up_1);
endmodule
Digital Design — Chapter 1 — Introduction and
Methodology
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Behavioral Module Definition
module vat_buzzer_struct
( output buzzer,
input above_25_0, above_30_0, low_level_0,
input above_25_1, above_30_1, low_level_1,
input select_vat_1 );
assign buzzer =
select_vat_1 ? low_level_1 | (above_30_1 | ~above_25_1)
: low_level_0 | (above_30_0 | ~above_25_0);
endmodule
Digital Design — Chapter 1 — Introduction and
Methodology
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Design Methodology
Simple systems can be design by one
person using ad hoc methods
Real-world systems are design by
teams
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Require a systematic design methodology
Specifies
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Tasks to be undertaken
Information needed and produced
Relationships between tasks
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dependencies, sequences
EDA
tools
used
Digital
Design
— Chapter 1 — Introduction and
Methodology
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Design using Abstraction
Circuits contain millions of transistors
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Abstraction
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How can we manage this complexity?
Focus on relevant aspects, ignoring other
aspects
Don’t break assumptions that allow aspect
to be ignored!
Examples:
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Transistors are on or off
Voltages are low or high
Digital Design — Chapter 1 — Introduction and
Methodology
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Embedded Systems
Most real-world digital systems include
embedded computers
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Different functional requirements can be
implemented
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Processor cores, memory, I/O
by the embedded software
by special-purpose attached circuits
Trade-off among cost, performance,
power, etc.
Digital Design — Chapter 1 — Introduction and
Methodology
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