Transcript ESE534 Computer Organization Day 8: February 10, 2010 Energy, Power, Reliability Penn ESE534 Spring2010 -- DeHon.

ESE534
Computer Organization
Day 8: February 10, 2010
Energy, Power, Reliability
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Penn ESE534 Spring2010 -- DeHon
Today
•
•
•
•
•
Energy Tradeoffs?
Voltage limits and leakage?
Variations
Transients
Thermodynamics meets Information
Theory (brief, if we get to it)
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Penn ESE534 Spring2010 -- DeHon
At Issue
• Many now argue power will be the ultimate
scaling limit
– (not lithography, costs, …)
• Proliferation of portable and handheld
devices
– …battery size and life biggest issues
• Cooling, energy costs may dominate cost
of electronics
– Even server room applications
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Penn ESE534 Spring2010 -- DeHon
Preclass 1
• 1GHz case
– Voltage?
– Energy per Operation?
– Power required for 2 processors?
• 2GHz case
– Voltage?
– Energy per Operation?
– Power required for 1 processor?
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Penn ESE534 Spring2010 -- DeHon
Energy and Delay
1
2
E  CV
2
tgd=Q/I=(CV)/I
Id,sat=(mCOX/2)(W/L)(Vgs-VTH
2
)
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Penn ESE534 Spring2010 -- DeHon
Tradeoff
• EV2
 tgd1/V
1
E  CV 2
2
Tgd=(CV)/I
Id,sat (Vgs-VTH)2
• We can trade speed for energy
• E×(tgd)2 constant
Martin et al. Power-Aware Computing, Kluwer 2001
http://caltechcstr.library.caltech.edu/308/
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Parallelism
• We have Area-Time tradeoffs
• Compensate slowdown with additional
parallelism
• …trade Area for Energy  Architectural Option
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Question
• How far can this go?
• What limits us?
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Penn ESE534 Spring2010 -- DeHon
Challenge: Power
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DeHon-Workshop FPT 2009
Origin of Power Challenge
• Limited capacity to remove heat
– ~100W/cm2 force air
– 1-10W/cm2 ambient
• Transistors per chip grow at Moore’s Law rate
= (1/F)2
• Energy/transistor must decrease at this rate
to keep constant power density
• E/tr  CV2
– …but V scaling more slowly than F
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DeHon-Workshop FPT 2009
Energy per Operation
1
2
E  CV
2
Ctotal = # transistors × Ctr
Ctr scales (down) as F
# transistors scales as F-2
…ok if V scales as F…
Penn ESE534 Spring2010 -- DeHon
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ITRS Vdd Scaling:
V Scaling more slowly than F
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DeHon-Workshop FPT 2009
CV2 scaling from ITRS:
More slowly than (1/F)2
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DeHon-Workshop FPT 2009
Origin of Power Challenge
• Transistors per chip
grow at Moore’s
Law rate = (1/F)2
• Energy/tr must
decrease at this rate
to keep constant
• E/tr  CV2f
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DeHon-Workshop FPT 2009
Historical Power Scaling
DeHon-Workshop FPT 2009
[Horowitz et al. / IEDM 2005]
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Impact
• Can already place more transistors on a
chip than we can afford to turn on.
• Power potential challenge/limiter for all
future chips.
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Impact
Power Limits Integration
Density Limit
Constant Power Limit
45nm
DeHon-Workshop FPT 2009
32nm
22nm
16nm
Source: Carter/Intel
11nm
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How far can we reduce
voltage?
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Limits
• Ability to turn off the transistor
• Noise
• Parameter Variations
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Penn ESE534 Spring2010 -- DeHon
MOSFET Conduction
Penn ESE534 Spring2010 -- DeHon
From: http://en.wikipedia.org/wiki/File:IvsV_mosfet.png
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Transistor Conduction
• Three regions
– Subthreshold (Vgs<VTH)
– Linear (Vgs>VTH) and (Vds < (Vgs-VTH))
– Saturation (Vgs>VTH) and (Vds > (Vgs-VTH))
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Penn ESE534 Spring2010 -- DeHon
Saturation Region
• Saturation Region
• (Vgs>VTH)
• (Vds > (Vgs-VTH))
Id,sat=(mCOX/2)(W/L)(Vgs-VTH
2
)
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Penn ESE534 Spring2010 -- DeHon
Linear Region
• (Vgs>VTH)
• (Vds < (Vgs-VTH))
Id,lin=(mCOX)(W/L)(Vgs-VTH)Vds-(Vds)2/2
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Penn ESE534 Spring2010 -- DeHon
Subthreshold Region
• (Vgs<VTH)
V

 IVT 10
g s VTH
Isub
/ S
S  (ln(10))kT / e
[Frank, IBM J. R&D v46n2/3p235]
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DeHon-Workshop FPT 2009
Operating a Transistor
• Concerned about Ion and Ioff
• Ion drive current for charging
– Determines speed: Tgd = CV/I
• Ioff leakage current
– Determines leakage power
• Eleak = V×Ileak×Tcycle
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Penn ESE534 Spring2010 -- DeHon
Leakage
• To avoid leakage want Ioff very small
• Switch V from 0 to Vdd
• Vgs in off state is 0  Vgs<VTH
V

 IVT 10
g s VTH
/ S
Isub
VTH / S
Ioff  IVT 10
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DeHon-Workshop FPT 2009
Leakage
VTH / S
Ioff  IVT 10
• S90mV for single gate
• S70mV for double gate
• 4 orders of magnitude IVT/IoffVTH>280mV
Leakage limits VTH in turn limits Vdd 27
DeHon-Workshop FPT 2009
How maximize Ion/Ioff ?
• Maximize Ion/Ioff – for given Vdd ? EswCV2
• Get to pick VTH, Vdd
Id,sat=(mCOX/2)(W/L)(Vgs-VTH
2
)
Id,lin=(mCOX)(W/L)(Vgs-VTH)Vds-(Vds)2/2
Isub
V

 IVT 10
Penn ESE534 Spring2010 -- DeHon
g s VTH
/ S
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Preclass 2
• E = Esw + Eleak
• Eleak = V×Ileak×Tcycle
• EswCV2
Isub
V

 IVT 10
g s VTH
• Ichip-leak = Ndevices ×Itr-leak
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/ S
Preclass 2
• Eleak(V) ?
• Tcycle(V)?
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In Class
• Assign calculations
• Collect results
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Values
V
T(v)
0.36
Esw(V)
Eleak(V)
E(V)
3.6E-09
1.296E-09
1.296E-11
1.30896E-09
0.27 0.000000027
7.29E-10
7.29E-11
8.019E-10
0.24 5.17064E-08
5.76E-10
1.24095E-10
7.00095E-10
0.21 9.74734E-08
4.41E-10
2.04694E-10
6.45694E-10
0.205 1.08137E-07 4.2025E-10
2.21682E-10
6.41932E-10
4E-10
2.39794E-10
6.39794E-10
1.4711E-07
3.61E-10
2.79509E-10
6.40509E-10
0.18 0.00000018
3.24E-10
3.24E-10
6.48E-10
0.15 3.23165E-07
2.25E-10
4.84748E-10
7.09748E-10
0.12 5.56991E-07
1.44E-10
6.68389E-10
8.12389E-10
8.1E-11
8.1E-10
8.91E-10
0.2 1.19897E-07
0.19
0.09
0.0000009
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Graph for In Class
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Penn ESE534 Spring2010 -- DeHon
Impact
• Subthreshold slope prevents us from
scaling voltage down arbitrarily.
• Induces a minimum operating energy.
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Penn ESE534 Spring2010 -- DeHon
Challenge: Variation
(This section was a little rushed)
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DeHon-Workshop FPT 2009
Statistical
Dopant
Count and
Placement
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Penn ESE535 Spring 2009 -- DeHon
[Bernstein et al, IBM JRD 2006]
Vth Variability @ 65nm
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Penn ESE535 Spring 2009 -- DeHon
[Bernstein et al, IBM JRD 2006]
Variation
• Fewer dopants, atoms  increasing Variation
• How do we deal with variation?
% variation in VTH
(From ITRS prediction)
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DeHon-Workshop FPT 2009
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Impact of Variation?
• Higher VTH?
– Not drive as strongly
– Id,sat (Vgs-VTH)2
• Lower VTH?
– Not turn off as well  leaks more
VTH / S
Ioff  IVT 10
Penn ESE534 Spring2010 -- DeHon
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Variation
• Margin for expected variation
• Must assume VTH can be any value in range
Ion,min=Ion(Vth,max)
Probability Distribution
Id,sat (Vgs-VTH)2
VTH
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Penn ESE535 Spring 2009 -- DeHon
Margining
Probability Distribution
• Must raise Vdd to accommodate worstcase value
Ion,min=Ion(Vth,max)
•  increase energy
Id,sat (Vgs-VTH)2
VTH
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Penn ESE535 Spring 2009 -- DeHon
Variation
• Increasing variation forces higher voltages
– On top of our leakage limits
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DeHon-Workshop FPT 2009
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• Margins growing due to
increasing variation
Probability Distribution
Variations
Old
New
Delay
• Margined value may be worse than older
technology?
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DeHon-Workshop FPT 2009
End of Energy Scaling?
Black nominal
Grey with variation
[Bol et al., IEEE TR VLSI Sys 17(10):1508—1519]44
DeHon-Workshop FPT 2009
Chips Growing
• Larger chips  sample further out on
distribution curve
From: http://en.wikipedia.org/wiki/File:Standard_deviation_diagram.svg
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Lecture Ended Here
(Didn’t really cover material in
transient and thermodynamics
sections)
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Challenge Transients
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Penn ESE534 Spring2010 -- DeHon
Transient Sources
• Effects
– Thermal noise
– Timing
– Ionizing particles
 a particle 105 to 106 electrons
• Calculated gates with 15--30 electrons last time
– Even if CMOS restores, takes time
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Voltage and Error Rate
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[Austin et al.--IEEE Computer, March 2004]
Errors versus Frequency
4.0
1.0E+02
VCC & Temperature
FCLK Guardband
1.0E-01
3.0
1.0E-04
2.0
Conventional Design
Max TP
1.0
0.0
2100
2400
2700
Resilient Design
Max TP
1.0E-07
1.0E-10
3000
3300
1.0E-13
3600
Clock Frequency (MHz)
Penn ESE534 Spring2010 -- DeHon
[Bowman, ISSCC 2008]
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Error Rate (%)
Throughput (BIPS)
5.0
SEU/bit Norm to 130nm
Scaling and Error Rates
Increasing Error Rates
10
2X bit/latch count increase per
generation
logic
cache
arrays
1
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DeHon-Workshop FPT 2009
130
90
65
45
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Technology (nm)
Source: Carter/Intel
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Power and Reliability
• Intersection is the challenge
• Push Vdd in opposite directions
• Both reach inflection points
– From doesn’t matter
– To major concern
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DeHon-Workshop FPT 2009
Thermodynamics
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Lower Bound?
• Reducing entropy costs energy
• Single bit gate output
– Set from previous value to 0 or 1
– Reduce state space by factor of 2
– Entropy: S= k×ln(before/after)=k×ln2
– Energy=T S=kT×ln(2)
• Naively: setting a bit costs at least
kT×ln(2)
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Numbers (ITRS 2005)
• kT×ln(2) = 2.87×10-21J (at R.T.
K=300)
W/L=3  W=21nm=0.021mm
Table 41d
Penn ESE534 Spring2010 -- DeHon
C8×10-18F 10-17F
Eop=CV2=2.5×10-18F
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Recycling…
• Thermodynamics only says we have to
dissipate energy if we discard
information
• Can we compute without discarding
information?
• Will that help us?
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Three Reversible Primitives
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Penn ESE534 Spring2010 -- DeHon
Universal Primitives
• These primitives
– Are universal
– Are all reversible
• If keep all the intermediates they
produce
– Discard no information
– Can run computation in reverse
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Penn ESE534 Spring2010 -- DeHon
Thermodynamics
• In theory, at least, thermodynamics
does not demand that we dissipate any
energy (power) in order to compute.
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Penn ESE534 Spring2010 -- DeHon
Admin
• Assignment grades, feedback on
blackboard for HW1 and HW2
• Class Wed.
• No class next Monday (2/22)
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Penn ESE534 Spring2010 -- DeHon
Big Ideas
• Can trade time for energy
– …area for energy
• Noise and leakage limit voltage scaling
• Power major limiter going forward
– Can put more transistors on a chip than can switch
• Continued scaling demands
– Deal with noisier components
• High variation and high transient upsets
• Thermodynamically admissible to compute without
dissipating energy
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