Transcript CCDs : Current Developments Part 1 : Deep Depletion CCDs Improving the red response of CCDs. Part 2 : Low Light Level CCDs.

CCDs : Current Developments
Part 1 : Deep Depletion CCDs
Improving the red response of CCDs.
Part 2 : Low Light Level CCDs (LLLCCD)
A new idea from Marconi (EEV) to reduce or eliminate CCD read-out noise.
Part 1 : Deep Depletion CCDs
Improving the red response of CCDs.
Charge Collection in a CCD.
Charge packet
pixel
boundary
pixel
boundary
incoming
photons
Photons entering the CCD create electron-hole pairs. The electrons are then attracted towards
the most positive potential in the device where they create ‘charge packets’. Each packet
corresponds to one pixel
n-type silicon
Electrode Structure
p-type silicon
SiO2 Insulating layer
Deep Depletion CCDs 1.
Electric potential
The electric field structure in a CCD defines to a large degree its Quantum Efficiency (QE). Consider
first a thick frontside illuminated CCD, which has a poor QE.
Cross section through a thick frontside illuminated CCD
In this region the electric potential gradient
is fairly low i.e. the electric field is low.
Potential along this line
shown in graph above.
Any photo-electrons created in the region of low electric field stand a much higher chance of
recombination and loss. There is only a weak external field to sweep apart the photo-electron
and the hole it leaves behind.
Deep Depletion CCDs 2.
Electric potential
In a thinned CCD , the field free region is simply etched away.
Cross section through a thinned CCD
There is now a high electric field throughout the
full depth of the CCD.
This volume is
etched away
during manufacture
Problem : Thinned CCDs may have good blue
response but they become transparent
at longer wavelengths; the red response
suffers.
Red photons can now pass
right through the CCD.
Photo-electrons created anywhere throughout the depth of the device will now be detected.
Photons no longer have to pass through the electrode structure to reach active silicon.
Deep Depletion CCDs 3.
Electric potential
Ideally we require all the benefits of a thinned CCD plus an improved red response. The solution is to use a
CCD with an intermediate thickness of about 40mm constructed from Hi-Resistivity silicon. The increased
thickness makes the device opaque to red photons. The use of Hi-Resistivity silicon means that there are no field
free regions despite the greater thickness.
Cross section through a Deep Depletion CCD
Problem :
Hi resistivity silicon contains much lower
impurity levels than normal. Very few wafer
fabrication factories commonly use this
material and deep depletion CCDs have to
be designed and made to order.
Red photons are now absorbed in
the thicker bulk of the device.
There is now a high electric field throughout the full depth of the CCD. CCDs manufactured in this way
are known as Deep depletion CCDs. The name implies that the region of high electric field, also known as
the ‘depletion zone’ extends deeply into the device.
QE Improvements with Deep Depletion CCDs
100
90
80
QE %
70
60
CC1D20 MBE single
AR @320nm
50
CC1D20 BIV Broad
Band AR
40
EEV12 (Standard
Thinned)
30
Marconi Deep
Depletion (broad
Band AR)
20
10
0
300
400
500
600
700
nm
800
900
1000
Deep Depletion CCDs 4.
Fringing will also be reduced
Images illuminated by 900nm filter with 2nm bandpass
Thinned Marconi CCD (Current ISIS Blue)
CCID20 Deep Depletion CCD
Test data courtesy of ESO
ING Deep Depletion Camera
Destined for ISIS RED sometime this Summer
Part 2 : Low Light Level CCDs (LLLCCDs)
A new idea from Marconi that creates internal electron gain
in a CCD and reduces read-noise to sub-electron levels.
CCD Analogy
RAIN (PHOTONS)
VERTICAL
CONVEYOR
BELTS
(CCD COLUMNS)
BUCKETS (PIXELS)
HORIZONTAL
CONVEYOR BELT
(SERIAL REGISTER)
MEASURING
CYLINDER
(OUTPUT
AMPLIFIER)
Photomicrograph of a corner of an EEV CCD.
Bus wires
Serial Register
Read Out Amplifier
Edge of
Silicon
Image Area
Charge Collection in a CCD.
Charge packet
pixel
boundary
pixel
boundary
incoming
photons
Photons entering the CCD create electron-hole pairs. The electrons are then attracted towards
the most positive potential in the device where they create ‘charge packets’. Each packet
corresponds to one pixel.
n-type silicon
Electrode Structure
p-type silicon
SiO2 Insulating layer
Conventional Clocking 1
Insulating layer
Surface electrodes
Charge packet (photo-electrons)
Potential Energy
P-type silicon
Charge packets occupy potential minimums
N-type silicon
Potential Energy
Conventional Clocking 2
Potential Energy
Conventional Clocking 3
Potential Energy
Conventional Clocking 4
Potential Energy
Conventional Clocking 5
Potential Energy
Conventional Clocking 6
Potential Energy
Conventional Clocking 7
Potential Energy
Conventional Clocking 8
Potential Energy
Conventional Clocking 9
Conventional Clocking 10
Potential Energy
Charge packets have moved one pixel to the right
LLLCCD Gain Register Architecture
Conventional CCD
LLLCCD
Image Area
Image Area
On-Chip
Amplifier
Serial register
{
On-Chip
Amplifier
(Architecture unchanged)
Serial register
Gain register
The Gain Register can be added to any existing design
Multiplication Clocking 1
In this diagram we see a small section of the gain register
Potential Energy
Gain electrode
Multiplication Clocking 2
Gain electrode energised. Charge packets accelerated strongly into deep potential well.
Energetic electrons loose energy through creation of more charge carriers (analogous to
multiplication effects in the dynodes of a photo-multiplier) .
Potential Energy
Gain electrode
Multiplication Clocking 3
Potential Energy
Clocking continues but each time the charge packets pass through the gain electrode, further
amplification is produced. Gain per stage is low, <1.015, however the number of stages is high so the
total gain can easily exceed 10,000
Multiplication Clocking 4
Gain Sensitivity of CCD65
10000
Gain
1000
100
10
1
20
25
30
35
40
35
40
Clock High Voltage
Readout Noise of CCD65
Equivalent noise
electrons RMS
100
10
1
0.1
0.01
20
25
30
Clock High Voltage
The Multiplication Register has a gain strongly dependant on the clock voltage
Noise Equations 1.
Conventional CCD SNR Equation
-0.5
SNR = Q.I.t.[Q.t.( I +B ) +Nr2 ]
SKY
Q
I
t
BSKY
Nr
= Quantum Efficiency
= Photons per pixel per second
= Integration time in seconds
= Sky background in photons per pixel per second
= Amplifier (read-out) noise in electrons RMS
Very hard to get Nr < 3e, and then only by slowing down the readout
significantly. At TV frame rates, noise > 50e
Trade-off between readout speed and readout noise
Noise Equations 2.
LLLCCD SNR Equation
SNR = Q.I.t.Fn.[Q.t.Fn.( I +BSKY) +(Nr/G)2 ]
-0.5
G = Gain of the Gain Register
Fn = Multiplication Noise factor = 0.5
With G set sufficiently high,
this term goes to zero, even at
TV frame rates.
Unfortunately, the problem of multiplication noise is introduced
Readout speed and readout noise are decoupled
Multiplication Noise 1.
In this example, A flat field image is read out through the multiplication register.
Mean illumination is 16e/pixel. Multiplication register gain =100
Ideal Histogram, StdDev=Gain x (Mean Illumination in electrons )0.5
Actual Histogram, StdDev=Gain x (Mean Illumination in electrons )0.5 x M
Probability
Histogram broadened
by multiplication noise
M=1.4
Electrons per pixel at output of multiplication register
Multiplication Noise 2.
SNR
Multiplication noise has the same effect as a reduction of QE by a factor of two.
In high signal environments , LLLCCDs will generally perform worse than
conventional CCDs. They come into their own, however, in low signal, high-speed
regimes.
Conventional CCD
LLLCCD
Signal Level
Photon Counting 1.
Offers a way of removing multiplication noise.
Photo-electron
detection threshold
CCD Video waveform
One
No
photo-electron photo-electron
One
photo-electron
No
No
Two
photo-electron photo-electron photo-electrons
Co-incidence loss
here
Photo-electron detection pulses
Fast comparator
CCD
Approx 100ns
SNR = Q.I.t.[Q.t.( I +BSKY)]
Noiseless Detector
-0.5
Photon Counting 2.
If exposure levels are too high, multi-electron events will be counted as single-electron
events, leading to co-incidence losses . This limits the linearity and reduces the effective
QE of the system.
Non-Linearity from Photon-Counting Coincidence Losses
Photo-electron
generation rate
Non-Linearity
(electrons per pixel per frame)
%
0.02
1
0.033
1.6
0.1
5
In the case of a hypothetical 1K x 1K photon counting CCD, the maximum frame rate
would be approximately 10Hz. If we can only accept 5% non-linearity then the maximum
illumination would be approximately 1 photo-electron per pixel per second.
Summary.
The three operational regimes of LLLCCDs
1) Unity Gain Mode.
The CCD operates normally with the SNR dictated by the photon shot noise added in
quadrature with the amplifier read noise. In general a slow readout is required (300KPix/second)
to obtain low read noise (4 electrons would be typical). Higher readout speeds possible but there
will be a trade-off with the read-noise.
2) High Gain Mode.
Gain set sufficiently high to make noise in the readout amplifier of the CCD negligible.
The drawback is the introduction of Multiplication Noise that reduces the SNR
by a factor of 1.4. Read noise is de-coupled from read-out speed. Very high speed readout
possible, up to 11MPixels per second, although in practice the frame rate will probably be
limited by factors external to the CCD.
3) Photon Counting Mode.
Gain is again set high but the video waveform is passed through a comparator. Each trigger
of the comparator is then treated as a single photo-electron of equal weight. Multiplication
noise is thus eliminated. Risk of coincidence losses at higher illumination levels.
Possible Application 1.
Acquisition Cameras
Performance at CASS of WHT analysed below. The calculated SNR is for a single TV frame (40ms).
It is assumed that the seeing disc of the target star evenly illuminates 28 pixels
(0.6” seeing, 0.1”/pixel plate scale). SNR calculated for each pixel of the image.
3.5
Normal CCD
3
L3CS (LLLCCD)
2.5
SNR
theoretical limit
2
Zero-noise image tube
1.5
1
0.5
0
17
18
19
20
21
22
Mv
Assumptions: CCD QE=85%, LLLCCD QE=30%, Image Tube QE =11%
dark of moon, seeing 0.6”, 24um pixels (0.1”per pixel), 25Hz frame rate
Possible Application 2.
Acquisition Cameras
As for the previous slide but instead the exposure time is increased to 10s
10
9
8
7
SNR
6
5
4
Cryocam (standard CCD)
3
L3CS (LLLCCD)
2
theoretical limit
1
Zero-noise image tube
0
17
18
19
20
Mv
21
22
Possible Application 3.
Photon Counting Faint Object Spectroscopy
LLLCCDs operating in photon counting mode would seem to offer some promise.
The graph below shows the time taken to reach a SNR=3 for various source intensities
Thinned LLLCCD with Gain=1000
Source intensity at the detector
(photons per pixel per second)
10
Thinned LLLCCD +Photon Counting
Conventional CCD
1
0.1
0.01
0
200
400
600
Exposure Time Seconds
QE=70%
Amplifier Noise =5e
Background =0.001 photons per pixel per second
800
1000
Possible Application 4.
Wave Front Sensors
Algorithm used on the current NAOMI WFS produces reliable centroid
data when total signal per sub-aperture exceeds about 60 photons.
Current NAOMI WFS
10
9
Thinned LLLCCD With Gain=1000
8
shot noise limit
7
SNR
6
5
4
3
2
1
0
0
10
20
30
40
50
60
70
Photons per pixel per WFS frame
Amplifier Noise=5e
QE= 70%
80
90
100
Marconi LLLCCD Products 1.
CCD65
Aimed at TV applications
as a substitute for image
tube sensors. 576 x 288 pixels.
Thick frontside illuminated,
peak QE of 35%.
20 x 30um pixels
Camera systems based on this
chip available winter 2001
Would subtend 51” x 39” at WHT CASS
CCD 60
128x 128 pixel, thinned, has been built
but still under
development. For possible
application to Wavefront Sensing.
Low Priority for Marconi without
encouragement from the astronomical
community
CCD 79,86,87
Proposed future devices up to 1K square,
> 10 frames per second readout at
sub-electron noise levels.
As above
Marconi LLLCCD Products 2.
L3CS
Packaged camera containing TE cooled CCD65
frontside illuminated
20ms-100sec integration times
2e per pix per sec dark current
Binning and Windowing available
Firewire Interface +video output
Available towards end of 2001 (£25K)
L3CA
Packaged camera containing TE cooled CCD65
frontside illuminated
20ms-100sec integration times
<1e per pix per sec dark current
Binning available
video output
Lecture slides available on the ING web:
http://www.ing.iac.es/~smt/LLLCCD/lllccd.htm