Multicore Salsa Parallel Programming 2.0 Peking University October 31 2007 Geoffrey Fox, Huapeng Yuan, Seung-Hee Bae Community Grids Laboratory, Indiana University Bloomington IN 47404 Xiaohong Qiu Research.

Download Report

Transcript Multicore Salsa Parallel Programming 2.0 Peking University October 31 2007 Geoffrey Fox, Huapeng Yuan, Seung-Hee Bae Community Grids Laboratory, Indiana University Bloomington IN 47404 Xiaohong Qiu Research.

Multicore Salsa Parallel Programming 2.0

Peking University October 31 2007

Geoffrey Fox, Huapeng Yuan, Seung-Hee Bae

Community Grids Laboratory, Indiana University Bloomington IN 47404

Xiaohong Qiu

Research Computing UITS

,

Indiana University Bloomington IN

George Chrysanthakopoulos, Henrik Frystyk Nielsen

Microsoft Research, Redmond WA [email protected]

, http://www.infomall.org

1

 

Abstract of Multicore Salsa Parallel Programming 2.0

Multicore or manycore systems are probably not architecturally that different from parallel machines with which we are familiar. However in next 5-8 years the basic commodity (PC) chips will have 64-256 cores and currently there is little understanding of how to use them. It is clearly essential (at least for major US technology companies) that we effectively use such cores on broadly deployed machines. This constraint makes multicore chips an exciting and different problem.

We describe general issues in context of the SALSA project at http://www.infomall.org/multicore . This is using Service Aggregated Linked Sequential Activities where we are looking at a suite of parallel datamining applications as one important broadly useful capability for future multicore based systems that will offer users navigation and advice based on the ever increasing data from sensors and the Internet. A key idea is using services not libraries as the basic building block so that we can offer productive user interfaces (Parallel Programming 2.0) by adapting workflow and mashups for composing parallel services. We still imagine that services will be constructed by experts using extensions of current threading and MPI models. Automatic compilers do not seem practical in the key 5-8 year time frame although PGAS((Partitioned Global Address Space) could be valuable. We present results on 8 cores (two quadcore chips) using the Microsoft CCR/DSS runtime that combines MPI, threading and service capabilities.

2

   

Too much Computing?

Historically both grids and parallel computing have tried to increase computing capabilities

• •

by Optimizing performance of codes at cost of re-usability Exploiting all possible CPU’s such as Graphics co-processors and “ idle cycles ” (across administrative domains)

Linking central computers together such as NSF/DoE/DoD supercomputer networks without clear user requirements Next Crisis in technology area will be the opposite problem – commodity chips will be 32-128way parallel currently have no idea how to use them in 5 years time and we – especially on clients

Only 2 releases of standard software (e.g. Office) in this time span so need solutions that can be implemented in next 3-5 years Note that even cell phones will be multicore There is “ Too much data ” as well as “ Too much computing ” and maybe processing the data deluge will “solve” the “ Too much computing ” problem

• • •

Quite plausible on servers where we naturally will have lots of data Less clear on clients but short of other ideas Intel RMS analysis : Gaming and Generalized decision support (data mining) are two ways of using these cycles

Intel’s Projection

RMS: Recognition Mining Synthesis

R ecognition What is …?

M ining Is it …?

S ynthesis What if …?

Model Model-less Model-based multimodal recognition Find a model instance Today Real-time streaming and transactions on static – structured datasets Tomorrow Real-time analytics on dynamic, unstructured, multimodal datasets Create a model instance Very limited realism Photo-realism and physics-based animation

R ecognition M ining S ynthesis

What is a tumor?

Is there a tumor here?

What if the tumor progresses?

It is all about dealing efficiently with complex multimodal datasets

Images courtesy: http://splweb.bwh.harvard.edu:8000/pages/images_movies.html

Intel’s Application Stack

   

Too much Data to the Rescue?

Multicore servers have clear “universal parallelism” as many users can access and use machines simultaneously Maybe also need application parallelism (e.g. datamining) as needed on client machines Over next years, we will be submerged of course in data deluge

Scientific observations for e-Science

Local (video, environmental) sensors

Data fetched from Internet defining users interests Maybe data-mining of this “too much computing” “too much data” will use up the both for science and commodity PC’s

PC will use this data(-mining) to be intelligent user assistant ?

Must have highly parallel algorithms

    

Broad Parallelism Issues and Data-mining Algorithms

Looking at Intel list of algorithms (and all previous experience), we find there are two styles of “micro” parallelism

• •

Dynamic search as in integer programming, Hidden Markov Methods (and computer chess); irregular synchronization with dynamic threads “ MPI Style ” i.e. several threads running typically in SPMD (Single Program Multiple Data); collective synchronization of all threads together Most Intel RMS are “MPI Style” and very close to scientific algorithms even if applications are not science Note MPI historically runs with processes not threads but likely that threads will be implementation of choice for commodity applications Most “ commodity experience ” is for few way concurrency to support Windows/Linux O/S in “ dynamic thread ” paradigm Little experience in MPI style synchronization with threads

• • •

“Space-Time” Picture

Data-parallel and memory applications map spatial structure of problem on parallel structure of both CPU’s However “left over” parallelism has to map into time on computer Data-parallel languages support this

T 4 Computer Time T 3 T 2 Application Time t 4 t 3 t 2 t 1 t 0 Application Space “Internal” (to data chunk) application spatial dependence (

n

degrees of freedom) maps into time on the computer T 1 T 0 4-way Parallel Computer (CPU’s)

• • • • •

Data Parallel Time Dependence

A simple form of data parallel applications are synchronous with all elements of the application space being evolved with essentially the same instructions Such applications are suitable for supercomputers (and GPUs but these are more general than just synchronous) SIMD computers and run well on vector However synchronous applications also run fine on MIMD machines SIMD CM-2 evolved to MIMD CM-5 with same data parallel language CMFortran The iterative solutions to Laplace’s equation matrix algorithms are synchronous as are many full

Application Time Synchronous Synchronization on MIMD machines is accomplished by messaging It is automatic on SIMD machines!

t 4 t 3 t 2 t 1 t 0 Application Space Identical evolution algorithms

• • • • •

Local Messaging for Synchronization

MPI_SENDRECV is typical primitive Processors do a send followed by a receive or a receive followed by a send In two stages (needed to avoid race conditions), one has a complete left shift Often follow by equivalent right shift, do get a complete exchange This logic guarantees correctly updated data is sent to processors that have their data at same simulation time

Application and Processor Time Communication Phase Compute Phase Communication Phase Compute Phase Communication Phase Compute Phase Communication Phase

8 Processors

Application Space

• •

Loosely Synchronous Applications

This is

most common large scale science and engineering and one has the traditional data parallelism but now each data point has in general a different update Comes from heterogeneity in problems that would be synchronous if homogeneous

• • •

t Time steps typically uniform but sometimes need to support variable time steps across application space – however ensure small time steps are

t = (t 1 0 )/Integer so subspaces with finer time steps do synchronize with full domain The time synchronization via

Application Time

messaging is still valid However one no longer balances load (ensure each processor does equal work in each time step) by putting equal number of points in each processor

t 4 t 3 t 2 t 1 t 0

Load balancing although NP

Application Space

complete is in practice surprisingly easy

Distinct evolution algorithms for each data point in each processor

• • •

Dynamic (search/Thread) Applications

Here there is no natural universal ‘time’ in the application as there is in science algorithms where an iteration number or Mother Nature’s time gives global synchronization Loose (zero) coupling or special features of application needed for successful parallelization

Application Time

In computer chess, the minimax scores at parent nodes provide multiple dynamic synchronization points

Application Time Application Space Application Space

Some links

See http://www.connotea.org/user/crmc for references - select tag oldies for venerable links; tags like MPI Applications Compiler have obvious significance

http://www.infomall.org/salsa for recent work including publications

My tutorial http://grids.ucs.indiana.edu/ptliupages/presentations/PC2007/index.html

If you have forgotten about parallel computing (or never learnt)

    

Multicore SALSA at CGL

S ervice A ggregated L inked S equential A ctivities Aims to link parallel and distributed (Grid) computing by developing parallel applications as services and not as programs or

libraries Improve traditionally poor parallel programming development environments Can use messaging to link parallel and Grid services but performance – functionality tradeoffs different

Parallelism needs few µs latency for message latency and thread spawning

Network overheads in Grid 10-100’s µs Use low latency where performance needed ; use high latency where productivity needed Developing set of services (library) of multicore parallel data mining algorithms

      

Parallel Programming Model

If multicore technology is to succeed, mere mortals build effective parallel programs must be able to There are interesting new developments – especially the new Darpa HPCS Languages X10, Chapel and Fortress However if years, then we must use today’s technology and we must make it easy

mortals are to program the 64-256 core chips expected in 5-7 This rules out radical new approaches such as new languages Remember that the important applications are not scientific computing but most of the algorithms needed are similar to those explored in scientific parallel computing We can divide problem into two parts:

Micro-parallelism: High Performance scalable (in number of cores) parallel kernels or libraries

Macro-parallelism: Composition of kernels into complete applications We currently assume that the kernels of the scalable parallel algorithms/applications/libraries will be built by experts with a Broader group of programmers (mere mortals ) composing library members into complete applications.

    

Scalable Parallel Components

There are no agreed high-level programming environments for building library members that are broadly applicable. However lower level approaches where experts define parallelism explicitly are available and have clear performance models. These include MPI for messaging or just locks within a single shared memory.

There are several patterns to support here including the collective synchronization of MPI, dynamic irregular thread parallelism needed in search algorithms, and more specialized cases like discrete event simulation . We use Microsoft CCR http://msdn.microsoft.com/robotics/ as it supports both MPI and dynamic threading style of parallelism

Good and Bad about MPI

 • • •

MPI (or equivalent locks on shared memory machine) has a bad reputation as the “ machine-code ” approach to parallel computing User must break problem into parts User must program each part User must generate synchronization/messaging between parts

However these defects imply a very clear performance model as user needs to make explicit both application and machine structure

Thus if you can do this, one expects reliable understandable results that port well between different architectures

  

Other Parallel Programming Models

OpenMP annotation or Automatic Parallelism of existing software is practical way to use those pesky cores with existing code

• •

As parallelism is typically not expressed precisely, one needs luck to get good performance Remember writing in Fortran, C, C#, Java … throws away information about parallelism HPCS Languages should be able to properly express parallelism but we do not know how efficient and reliable compilers will be

High Performance Fortran failed as language expressed a subset of parallelism and compilers did not give predictable performance PGAS (Partitioned Global Address Space) like UPC, Co-array Fortran, Titanium, HPJava

One decomposes application into parts and writes the code for each component but use some form of global index

• •

Compiler generates synchronization and messaging PGAS approach should work but has never been widely used – presumably because compilers not mature

Summary of micro-parallelism

 

On new applications , use MPI/locks with explicit user decomposition A subset of applications can use “ data parallel ” compilers which follow in HPF footsteps

Graphics Chips and Cell processor motivate such special compilers but not clear how many applications can be done this way

OpenMP and/or Compiler-based Automatic Parallelism for existing codes in conventional languages

         

Composition of Parallel Components

The

composition (macro-parallelism) step has many excellent solutions as this does not have the same drastic synchronization and correctness constraints as one has for scalable kernels Unlike micro-parallelism step which has no very good solutions Task parallelism in languages such as C++, C#, Java and Fortran90; General scripting languages like PHP Perl Python Domain specific environments like Matlab and Mathematica Functional Languages like MapReduce , F# HeNCE, AVS and Khoros from the past and CCA from DoE Web Service/Grid Workflow Pipeline Pilot (from SciTegic) and the LEAD environment built at Indiana University. like Taverna, Kepler, InforSense KDE, Web solutions like Mash-ups and DSS Many scientific applications use MPI for the coarse grain composition as well as fine grain parallelism but this doesn’t seem elegant The new languages from Darpa’s supported.

HPCS program support task parallelism (composition of parallel components) decoupling composition and scalable parallelism will remain popular and must be

    

Mashups v Workflow?

Mashup Tools are reviewed at http://blogs.zdnet.com/Hinchcliffe/?p=63 Workflow Tools are reviewed by Gannon and Fox http://grids.ucs.indiana.edu/ptliupages/publications/Workflow-overview.pdf

Both include distributed of services scripting in PHP, Python, sh etc. as both implement programming at level Mashups use all types of service interfaces and perhaps do not have the potential robustness (security) of Grid service approach Mashups typically “pure” HTTP ( REST )

23

Grid Workflow Data Assimilation in Earth Science Grid services triggered by abnormal events and controlled by workflow process real time data from radar and high resolution simulations for tornado forecasts Typical graphical interface to service composition Taverna another well known Grid/Web Service workflow tool Recent Web 2.0 visual Mashup tools include Yahoo Pipes and Microsoft Popfly

    

“Service Aggregation” in SALSA

Kernels and Composition must be supported both inside chips (the multicore problem) and Grids. between machines in clusters (the traditional parallel computing problem) or The scalable parallelism (kernel) problem is typically only interesting on true parallel computers as the algorithms require low communication latency. However

composition is similar in both parallel and distributed scenarios and it seems useful to allow the use of Grid and Web composition tools for the parallel problem. This should allow parallel computing to exploit large investment in service programming environments Thus in SALSA we express parallel kernels not as traditional libraries but as (some variant of) services so they can be used by non expert programmers For parallelism expressed in CCR , DSS natural service (composition) model.

represents the

Parallel Programming 2.0

Web 2.0 Mashups will (by definition the largest market) drive composition tools for Grid, web and parallel programming

Parallel Programming 2.0

will build on Mashup tools like Yahoo Pipes and Microsoft Popfly Yahoo Pipes

Inter-Service Communication

Note that we are not assuming a uniform implementation of service composition even if user sees same interface for multicore and a Grid

Good service composition inside a multicore chip can require highly optimized communication mechanisms between the services that minimize memory bandwidth use.

Between systems interoperability could motivate very different mechanisms to integrate services.

Need both MPI/CCR level and Service/DSS level communication optimization

Note bandwidth and latency requirements reduce as one increases the grain size of services

Suggests the smaller services inside closely coupled cores and machines will have stringent communication requirements.

    

Inside the SALSA Services

We generalize the well known Processes) of Hoare to describe the low level approaches to fine grain parallelism as “ L inked S CSP equential A (Communicating Sequential ctivities” in

SALSA

. We use term “ activities ” in SALSA to allow one to build services from either threads , processes (usual MPI choice) or even just other services . We choose term “ linkage ” in SALSA to denote the different ways of synchronizing the parallel activities that may involve shared memory rather than some form of messaging or communication.

There are several engineering and research issues for SALSA

There is the critical communication optimization problem area for communication inside chips, clusters and Grids.

• •

We need to discuss what we mean by The requirements of multi-language services support Further it seems useful to threads).

Should start a re-examine MPI and define a simpler model that naturally supports threads or processes and the full set of communication patterns needed in SALSA (including dynamic new standards effort in OGF perhaps?

CICC Chemical Informatics and Cyberinfrastructure Collaboratory Web Service Infrastructure Cheminformatics Services Statistics Services Database Services

Core functionality

Fingerprints Similarity Descriptors 2D diagrams File format conversion

Computation functionality

Regression Classification Clustering Sampling distributions

3D structures by

CID SMARTS 3D Similarity

Applications

Docking Filtering Druglikeness

Applications

Predictive models Feature selection Toxicity predictions Mutagenecity predictions 2D plots Arbitrary R code (PkCell) Anti-cancer activity predictions Pharmacokinetic parameters OSCAR Document Analysis

Need to make all this parallel

InChI Generation/Search Computational Chemistry (Gamess, Jaguar etc.)

Docking scores/poses by

CID SMARTS Protein Docking scores

PubChem related data by

CID, SMARTS

Varuna.net

Quantum Chemistry

Core Grid Services

Service Registry Job Submission and Management

Local Clusters IU Big Red, TeraGrid, Open Science Grid

Portal Services

RSS Feeds User Profiles Collaboration as in Sakai

   

Deterministic Annealing for Data Mining

We are looking at deterministic annealing algorithms because although heuristic

They have clear scalable parallelism (e.g. use parallel BLAS )

They avoid (some) local minima and regularize ill defined problems in an intuitively clear fashion

• •

They are fast (no Monte Carlo) I understand them and Google Scholar likes them Developed first by Durbin as Elastic Net for TSP Extended by Rose (my student then; now at UCSB)) and Gurewitz (visitor to C 3 P) at Caltech for signal processing and applied later to many optimization and supervised and unsupervised learning methods.

See K. Rose , "

Deterministic Annealing for Clustering, Compression, Classification, Regression, and Related Optimization Problems

," Proceedings of the IEEE, vol. 80, pp. 2210-2239, November 1998

   

High Level Theory

Deterministic Annealing can be looked at from a Physics, Statistics and/or Information theoretic point of view Consider a function (e.g. a likelihood ) L({y}) that we want to operate on (e.g. maximize ) Set L

({y

},T) =

 •

L({y}) exp(- ({y

} - {y}) 2 /T ) d{y} Incorporating entropy term ensuring that one looks for most

likely states at temperature T If {y} is a distance , replacing L by L

or smoothing it over resolution

T corresponds to smearing Minimize Free Energy F = -Ln L

({y

},T) rather than energy E = -Ln L ({y})

Use mean field approximation to avoid Monte Carlo (simulated annealing)

Deterministic Annealing for Clustering I

 

N

Points

x i

and

K

Cluster Centers

y k

Pr(

x i

C k

)

exp(

E

(

x i

,

y k

) /

T

) /

Z

(

x i

) where

Z

(

x i

)

 

K k

 1

exp(

E

(

x i

,

y k

) /

T

)

E

(

x i

,

y k

)

(

x i

y k

)

2

Free Energy

F

 

T

i N

 1

ln

Z

(

x i

)) Compare Simple Gaussian Mixture (K centers) with

Z

(

x i

)

 

K k

 1

P k

exp(

E

(

x i

,

y k

) /( 2

k

2

) )

Illustrating similarity between clustering and Gaussian mixtures and anneals down to mixture size

2 

k

2 

k

2 

T

Deterministic Annealing for Clustering II

with Pr(

x i

C k

)  exp( 

E

(

x i

,

y k old

) /

T

) /

Z

(

x i

,

y k old

) Calculate

y k new

 

i N

 1

x i

Pr(

x i

C k

) 

i N

 1 Pr(

x i

C k

)      

This is an extended K-means algorithm Start with a single cluster giving as solution y

1

as centroid For some annealing schedule for T, iterate above algorithm testing correlation matrix in x

i

“elongated” about each cluster center to see if Split cluster if elongation “long enough”; splitting is a phase transition in physics view You do not need to assume number of clusters resolution

T or equivalent but rather a final At T=0 , uninteresting solution is N clusters; one at each point x

i

Deterministic Annealing

F({y}, T) Solve Linear Equations for each temperature Nonlinearity removed by approximating with solution at previous higher temperature

 

Configuration {y} Minimum evolving as temperature decreases Movement at fixed temperature going to local minima if not initialized “correctly

     

Clustering Data

Cheminformatics was tested successfully with small datasets and compared to commercial tools Cluster on properties of chemicals from high throughput screening results to chemical properties (structure, molecular weight etc.) Applying to PubChem (and commercial databases) that have 6 20 million compounds

Comparing traditional fingerprint properties (binary properties) with real-valued GIS Census aggregated in 200,000 Census Blocks covering Indiana

uses publicly available Census data; in particular the 2000 100MB of data Initial clustering done on simple attributes given in this data

Total population and number of Asian , Hispanic and Renters Working with POLIS Center at Indianapolis on clustering of SAVI ( Social Assets and Vulnerabilities Indicators ) attributes at http://www.savi.org

) for community and decision makers

Economy, Loans, Crime, Religion etc.

    

Where are we?

We have deterministically annealed clustering running well do this (is there a large Windows quad core cluster on TeraGrid?)

This would also be efficient on large problems on 8 core (2-processor quad core) Intel systems using C# and Microsoft Robotics Studio CCR/DSS Could also run on multicore-based parallel machines but didn’t Applied to Geographical Information Systems (GIS) and census data

Could be an interesting application on future broadly deployed PC’s

Visualize nicely on Google Maps (and presumably Microsoft Virtual Earth) Applied to several Cheminformatics problems efficiency but dimensions visualization harder and have parallel as in 150-1024 (or more) Will develop a family of such parallel annealing data-mining tools

• • •

where basic approach known for Clustering Gaussian Mixtures and possibly (Expectation Maximization) Hidden Markov Methods

• • • • • • • • •

Microsoft CCR

Supports exchange of messages between threads using named ports FromHandler: Spawn threads without reading ports Receive: Each handler reads one item from a single port MultipleItemReceive: Each handler reads a prescribed number of items of a given type from a given port. Note items in a port can be general structures but all must have same type.

MultiplePortReceive: Each handler reads a one item of a given type from multiple ports.

JoinedReceive: Each handler reads one item from each of two ports. The items can be of different type.

Choice: Execute a choice of two or more port-handler pairings Interleave: Consists of a set of arbiters (port -- handler pairs) of 3 types that are Concurrent, Exclusive or Teardown (called at end for clean up). Concurrent arbiters are run concurrently but exclusive handlers are http://msdn.microsoft.com/robotics/ 37

Preliminary Results

Parallel Deterministic Annealing Clustering in C# with speed-up of 7 on Intel 2 quadcore systems

• •

Analysis of performance of Java, C, C# in MPI and dynamic threading with XP, Vista, Windows Server, Fedora, Redhat on Intel/AMD systems

Study of cache effects coming with MPI thread-based parallelism Study of execution time fluctuations in Windows (limiting speed-up to 7 not 8!)

Machines Used

AMD4:

HPxw9300 workstation, 2 AMD Opteron CPUs Processor 275 at 2.19GHz,

4 cores

L2 Cache 4x1MB (summing both chips), Memory 4GB, XP Pro 64bit , Windows Server, Red Hat C# Benchmark Computational unit:

1.388 µs Intel4:

Dell Precision PWS670, 2 Intel Xeon Paxville CPUs at 2.80GHz,

4 cores

L2 Cache 4x2MB, Memory 4GB, XP Pro 64bit C# Benchmark Computational unit:

1.475 µs Intel8a:

Dell Precision PWS690, 2 Intel Xeon CPUs E5320 at 1.86GHz,

8 cores

L2 Cache 4x4M, Memory 8GB, XP Pro 64bit C# Benchmark Computational unit:

1.696 µs Intel8b:

Dell Precision PWS690, 2 Intel Xeon CPUs E5355 at 2.66GHz,

8 cores

L2 Cache 4x4M, Memory 4GB, Vista Ultimate 64bit, Fedora 7 C# Benchmark Computational unit:

1.188 µs Intel8c:

Dell Precision PWS690, 2 Intel Xeon CPUs E5345 at 2.33GHz,

8 cores

L2 Cache 4x4M, Memory 8GB, Red Hat 5.0, Fedora 7

Clustering algorithm annealing by decreasing distance scale and gradually finds more clusters as resolution improved Here we see 10 clusters increasing to 30 as algorithm progresses

Total Asian Hispanic Renters Total Asian Hispanic Purdue IUB 30 Clusters 10 Clusters

In detail, different groups have different cluster centers

DSS Section • We view system as a collection of services – in this case

– One to supply data – One to run parallel clustering – One to visualize results – in this by spawning a Google maps browser – Note we are clustering Indiana census data

• DSS is convenient as built on CCR

DSS "Get" (loop 1 to 10000; two services on one node)

350 300 250 200 150 100 50 0 1

DSS Service Measurements

10 100 1000 

way service messages processed (November 2006 DSS Release)

Measurements of Axis 2 shows about 500 microseconds – DSS is 10 times better

10000

44

Series1

Clustering Problem

• • • •

Deterministic Annealing

See K. Rose , "Deterministic Annealing for Clustering, Compression, Classification, Regression, and Related Optimization Problems," Proceedings of the IEEE, vol. 80, pp. 2210-2239, November 1998 Parallelization each processor is similar to ordinary K-Means as we are calculating global sums which are decomposed into local averages and then summed over components calculated in Many similar data mining algorithms (such as annealing for E-M expectation maximization ) which have high parallel efficiency and avoid local minima For more details see

http://grids.ucs.indiana.edu/ptliupages/presentations/Grid 2007PosterSept19-07.ppt

and

http://grids.ucs.indiana.edu/ptliupages/presentations/PC2 007/PC07BYOPA.ppt

0.25

0.2

0.15

0.1

0.05

0 0 0.45

Parallel Multicore Deterministic Annealing Clustering

Parallel Overhead on 8 Threads Intel 8b 10 Clusters

0.4

Overhead = Constant1 + Constant2/n Speedup = 8/(1+Overhead)

0.35

Constant1 = 0.05 to 0.1 (Client Windows) due to thread runtime fluctuations

0.3

0.5

1 1.5

20 Clusters 10000/(Grain Size n = points per core)

2 2.5

3 3.5

4

Parallel Multicore Deterministic Annealing Clustering

0.250

Parallel Overhead for large (2M points) Indiana Census clustering on 8 Threads Intel 8b This fluctuating overhead due to 5-10% runtime fluctuations between threads

0.200

“Constant1”

0.150

0.100

0.050

0.000

0 5

Increasing number of clusters decreases communication/memory bandwidth overheads

10 15 #cluster 20 25 30 35

Parallel Multicore Deterministic Annealing Clustering

0.200

0.180

0.160

0.140

0.120

0.100

0.080

0.060

0.040

0.020

0.000

0 2

Parallel Overhead for subset of PubChem clustering on 8 Threads (Intel 8b) 40,000 points with 1052 binary properties (Census is 2 real valued properties) Increasing number of clusters decreases communication/memory bandwidth overheads

4 6 8 #cluster 10 12 14 16 18

MPI Parallel Divkmeans clustering of PubChem

700 650 600 550 500 450 400 min_size 100 100 100 100 1 1 1 1 100 1000 1000 1000 1000 ncpus 350 300 250 0 10 20 30 Minsize 1 40 50

Number of processors

Minsize 100 60 Minsize 1000

AVIDD Linux cluster, 5,273,852 structures (Pubchem compound collection, Nov 2005)

20 40 60 80 20 40 40 60 80 20 40 60 80 wall_mins 676 444 379 353 462 356 356 339 337 513 376 346 346 walltime 11:16:06 7:24:24 6:18:41 5:53:00 7:41:58 5:56:01 5:55:47 5:38:44 5:36:53 8:32:39 6:16:25 5:46:22 5:45:40 70 80 90

Scaled Speed up Tests

• The full clustering algorithm involves different values of the number of clusters N C as computation progresses • The amount of computation per data point is proportional to N C and so overhead due to memory bandwidth (cache misses) declines as N C increases • We did a set of tests on the clustering kernel with fixed N C • Further we adopted the scaled speed-up approach looking at the performance as a function of number of parallel threads with constant number of data points assigned to each thread – This contrasts with fixed problem size scenario where the number of data points per thread is inversely proportional to number of threads • We plot Run time for same workload per thread divided by number of data points multiplied by number of clusters multiped by time at smallest data set (10,000 data points per thread) • Expect this normalized run time to be independent of number of threads if not for parallel and memory bandwidth overheads – It will decrease as N C increases as number of computations per points fetched from memory increases proportional to N C

Intel 8-core C# with 80 Clusters: Vista Run Time Fluctuations for Clustering Kernel

• 2 Quadcore Processors 0.1

between messaging synchronization points

Standard Deviation/Run Time

0.05

10,000 Datpts 50,000 Datapts 500,000 Datapts 0 0 1 2 3 4 thread 5

Number of Threads

6 7 8

Intel 8 core with 80 Clusters: Redhat Run Time Fluctuations for Clustering Kernel

• This is average of standard deviation of run time of the

80 Cluster(ratio of std to time vs #thread)

8 threads between messaging synchronization points 0.006

Standard Deviation/Run Time

0.004

0.002

10,000 Datapts 50,000 Datapts 500,000 Datapts 0 1 2 3 4 5

Number of Threads

6 7 8

Basic Performance of CCR

MPI Exchange Latency in µs (20-30 µs computation between messaging)

Machine Intel8c:gf12

(8 core 2.33 Ghz) (in 2 chips)

Intel8c:gf20 OS

Redhat Fedora

Runtime

MPJE (Java) MPICH2 (C) MPICH2: Fast MPJE

Grains

Process Process Process Process Process

Parallelism

8 8 8 8 8

MPI Exchange Latency

181 (8 core 2.33 Ghz) mpiJava MPICH2 Process Process 8 The macroscopic inter-service DSS Overhead is about 35µs 8 8 40.0

39.3

4.21

157 111 64.2

170

Intel8b

Vista MPJE Process DSS is composed from CCR threads that have Fedora MPJE Process 4µs mpiJava Process 20µs CCR (C#) Thread

AMD4

(4 core 2.19 Ghz) XP Redhat MPJE MPJE Process Process

Intel4 (4 core 2.8 Ghz)

XP XP mpiJava MPICH2 CCR CCR Process Process Thread Thread 8 8 8 4 4 4 4 4 4 142 100 20.2

185 152 99.4

39.3

16.3

25.8

CCR Overhead for a computation of 23.76 µs between messaging

Intel8b: 8 Core (μs) Pipeline 1 Number of Parallel Computations 2 3 4 7 8 1.58

2.44

3 2.94

4.5

5.06

Spawned Shift 2.42

3.2

3.38

5.26

5.14

Rendez vous MPI Two Shifts Pipeline Shift Exchange As Two Shifts Exchange 2.48

4.94

3.96

5.9

4.52

6.84

5.78

14.32 19.44

6.82

7.18

4.46

7.4

6.42

5.86

10.86 11.74

11.64

14.16 31.86 35.62

6.94

11.22

13.3

18.78 20.16

30 25 20 Time Microseconds AMD Exch AMD Exch as 2 Shifts AMD Shift 15 10 5 Stages (millions) 0 0 2 4 6 8 10

Overhead (latency) of AMD4 PC with 4 execution threads on MPI style Rendezvous Messaging for Shift and Exchange implemented either as two shifts or as custom CCR pattern

70 60 50 40 Time Microseconds Intel Exch Intel Exch as 2 Shifts Intel Shift 30 20 10 Stages (millions) 0 0 2 4 6 8 10

Overhead (latency) of Intel8b PC with 8 execution threads on MPI style Rendezvous Messaging for Shift and Exchange implemented either as two shifts or as custom CCR pattern

Basic Performance of MPI for C and Java

MPI Exchange Latency in µs (20-30 µs computation between messaging)

Machine Intel8c:gf12

(8 core 2.33 Ghz) (in 2 chips)

OS

Redhat

Runtime

MPJE (Java)

Grains

Process

Parallelism

8

MPI Exchange Latency

181

Intel8c:gf20

(8 core 2.33 Ghz)

Intel8b

(8 core 2.66 Ghz) Fedora Vista MPICH2 (C) MPICH2: Fast Nemesis MPJE mpiJava MPICH2 MPJE Process Process Process Process Process Process Process 8 8 8 8 8 8 8 40.0

39.3

4.21

157 111 64.2

170

AMD4

(4 core 2.19 Ghz)

Intel4 (4 core 2.8 Ghz)

Fedora Fedora Vista XP Redhat XP XP MPJE mpiJava CCR (C#) MPJE MPJE mpiJava MPICH2 CCR CCR Process Process Thread Process Process Process Process Thread Thread 8 8 8 4 4 4 4 4 4 142 100 20.2

185 152 99.4

39.3

16.3

25.8

Cache Line Interference

• • • • •

Cache Line Interference

Early implementations of our clustering algorithm showed large fluctuations due to the cache line interference effect discussed here and on next slide in a simple case We have one thread on each core each calculating a sum of same complexity storing result in a common array A with different cores using different array locations Thread i stores sum in A(i) is separation 1 – no variable access interference but cache line interference Thread i stores sum in A(X*i) is separation X Serious degradation if X < 8 (64 bytes) with Windows

– –

Note A is a double (8 bytes) Less interference effect with Linux – especially Red Hat

Cache Line Interference

Machine OS Intel8b Vista Intel8b Vista Intel8b Vista Intel8b Fedora Intel8a XP CCR Intel8a XP Locks Intel8a XP Intel8c Red Hat AMD4 AMD4 AMD4 WinSrvr WinSrvr WinSrvr Run Time C# CCR C# Locks C C C# C# C C C# CCR C# Locks C 1 Time µs versus Thread Array Separation (unit is 8 bytes) Mean Std/ Mean Mean 4 Std/ Mean 8 Mean Std/ Mean 1024 Mean Std/ Mean

8.03 13.0 13.4 .029 .0095 .0047 3.04 3.08 1.69 .059 .0028 .0026 0.884 .0051 0.883 .0043 0.66 .029 0.884 0.883 0.659 .0069 .0036 .0057 1.50 10.6 16.6 16.9 0.441 8.58 8.72 5.65 .01 .033 .016 .0016 .0035 .0080 .0036 .020 0.69 4.16 4.31 2.27 0.423 2.62 2.42 2.69 .21 .041 .0067 .0042 .0031 .081 0.01 .0060 0.307 .0045 1.27 1.27 1.05 .051 .066 0.946 .056 0.423 .0030 0.839 .0031 0.836 .0016 .0013 0.307 1.43 1.27 0.946 0.423 0.838 0.836 1.05 .016 .049 .054 .058 .032 .0031 .0013 .0014 • • •

AMD4 AMD4 AMD4 XP XP XP C# CCR C# Locks C

8.05 8.21 6.10 0.010 0.006 0.026 2.84 2.57 2.95 0.077 0.016 0.017 0.84 0.84 1.05 0.040 0.007 0.019 0.840 0.84 1.05 0.022 0.007 0.017

Note measurements at a separation X of 8 (and values between 8 and 1024 not shown) are essentially identical Measurements at 7 (not shown) are higher than that at 8 (except for Red Hat which shows essentially no enhancement at X<8) If effects due to co-location of thread variables in a 64 byte cache line, the array must be aligned with cache boundaries

In early implementations we found poor X=8 performance expected in words of A split across cache lines

Inter-Service Communication

Note that we are not assuming a uniform implementation of service composition even if user sees same interface for multicore and a Grid

Good service composition inside a multicore chip can require highly optimized communication mechanisms between the services that minimize memory bandwidth use.

Between systems interoperability could motivate very different mechanisms to integrate services.

Need both MPI/CCR level and Service/DSS level communication optimization

Note bandwidth and latency requirements reduce as one increases the grain size of services

Suggests the smaller services inside closely coupled cores and machines will have stringent communication requirements.

    

Inside the SALSA Services

We generalize the well known Processes) of Hoare to describe the low level approaches to fine grain parallelism as “ L inked S CSP equential (Communicating Sequential A ctivities” in

SALSA

. We use term “ activities ” in SALSA to allow one to build services from either threads , processes (usual MPI choice) or even just other services . We choose term “ linkage ” in SALSA to denote the different ways of synchronizing the parallel activities that may involve shared memory rather than some form of messaging or communication.

There are several engineering and research issues for SALSA

There is the critical communication optimization problem area for communication inside chips, clusters and Grids.

We need to discuss what we mean by services

The requirements of multi-language support Further it seems useful to threads).

Should start a re-examine MPI and define a simpler model that naturally supports threads or processes and the full set of communication patterns needed in SALSA (including dynamic new standards effort in OGF perhaps?