Transcript The Operational Amplifiers Dr. Farahmand Opamps Properties Ideal Architecture Practical overview Circuits Open Loop Closed Loop Parameters Frequency Response Modes of operation Negative Feedback Frequency Response Inverting Non-inverting.

The Operational Amplifiers
Dr. Farahmand
Opamps
Properties
Ideal
Architecture
Practical
overview
Circuits
Open Loop
Closed Loop
Parameters
Frequency Response
Modes of operation
Negative Feedback
Frequency Response
Inverting
Non-inverting
Operational Amplifiers



Historically built using vacuum tubes and
used for mathematical operations
Today, opamps are linear integrated circtuis
(ICs)
Terminal
–
–
–
Inverting and non-inverting inputs
Dc supplies
Single output
Opamps

Ideal opamps
–
–
–
–

Infinite BW
Infinite voltage gain
Infinite input impedance
Zero output impedance
Practical opamps
–
–
–
–
wide BW
Very high voltage gain
Very high input impedance
Very low output impedance
Architecture

3 stages
Differential amplifier input stage:
-Take the difference between the input signals
-If the input base voltage is different:
-Vb1 > Vb2
-Ic1 > Ic2
-VRc1 > VRc2
-Vc1 < Vc2
Modes of Operations

Differential amplifiers can be connected in difference
ways
–
Single-ended mode

–
Differential mode
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
–
Single input
Out of phase inputs
Unwanted noise on both inputs is cancelled
Common mode

In phase inputs
Parameters

Common mode input voltage
–
–

Input offset voltage (in mV)
–
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Total resistance between the inverting and noninverting inputs
Output impedance (in ohm)
–

Dc current required by the inputs of the amplifier
to properly operate the first stage ( Ibias = (I1 +
I2)/2 ); I1 and I2 are the current into inverting and
non-inverting inputs
Input impedance (in Mega ohm)
–

Differential dc voltage required between the
inputs to force the output to zero volt
Input bias current (in nA)
–

Input voltage range limitation
Typically +/- 10 V with dc voltages of +/- 15 V
Total resistance at the output
Slew rate (in V/usec)
–
How fast the output voltage changes in response
to the input voltage change
Parameters

Common mode input voltage
–
–

Input offset voltage (in mV)
–

Total resistance between the inverting and noninverting inputs
Output impedance (in ohm)
–

Dc current required by the inputs of the amplifier
to properly operate the first stage ( Ibias = (I1 +
I2)/2 ); I1 and I2 are the current into inverting and
non-inverting inputs
Input impedance (in Mega ohm)
–

Differential dc voltage required between the
inputs to force the output to zero volt
Input bias current (in nA)
–

Input voltage range limitation
Typically +/- 10 V with dc voltages of +/- 15 V
Total resistance at the output
Slew rate (in V/usec)
–
How fast the output voltage changes in response
to the input voltage change (Dt)
Refer to Table 12-1
CMRR

Common-mod-rejection ratio (CMRR)
–
–
–
–
The measurement of how the amplifier can reject
common more signals
CMRR = Open loop voltage gain / Common mode
gain
Often expressed in dB
The larger the better
From data
sheet
Ideally zero/ indicate how
much of input noise is
passing through
Open Loop Frequency Response

Aol(OL) : Open loop gain
AOL  AOL ( mid ) (
Vout
)
Vm id
AOL ( mid )
f2 
1 
2  In practice
f
c 

Vmid = Vin x AOL(mid)
AOL(mid
)
Vout
Xc


Vm id Xc  R
1
f2 
1 
2
f
c 

Open Loop Frequency Response
Frequency response: Aol(OL) = Aol(mid)
Critical frequency is the roll-off point
Phase response: q = -arctan (R/Xc) = -arctan (f/fc)
Delay = Period x Phase shift / 360
Open Loop Frequency Response
For multiple stages
qtotal = q1  q2  q3  ......
Av(dB) = Av1 + Av2 + Av3 + ….
Closed Loop Frequency Response
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Non-inverting
–
–
–
–
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Source is connected to the noninverting input
Feedback is connected to the
inverting input
If Rf and Ri are zero, then unity
feedback used for buffering
Vo=
Inverting
–
Feedback and source are
connected to the inverting input
Comparators




Determines which input is
larger
A small difference
between inputs results
maximum output voltage
(high gain)
Zero-level detection
Non-zero-level detection
Max and minimum
Example
Vref = Vin(max).R2/(R1+R2)=1.63 V
Comparator – Impact of noise
(unwanted voltage fluctuation)
No Noise
With Noise
Inaccuracy!
Hysteresis
(Schmitt triggers)

Making the
comparator less
sensitive to the
input noise
–
–
–
Effectively higher
reference level
Upper Trigger Point
Lower Trigger Point
VUTP = Vout(max).R2/(R1+R2)
VLTP = -Vout(max).R2/(R1+R2)
VHYS= VUTP – VLTP
Zener Bounding

The output voltage can be
limited using Zener diodes
–
–

Vout >0  Vz
Vout < 0  Forward biased
(0.7)
Note that the output signal
is inverted
Virtual Ground
Zener Bounding

Combined effect
?
Bounding
the
negative
values /
Resources

Applets
–
–
http://www.chem.uoa.gr/Applets/AppletOpAmps/A
ppl_OpAmps2.html
http://www.falstad.com/circuit/directions.html