Network for Computational Nanotechnology (NCN) Purdue, Norfolk State, Northwestern, MIT, Molecular Foundry, UC Berkeley, Univ.
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Network for Computational Nanotechnology (NCN) Purdue, Norfolk State, Northwestern, MIT, Molecular Foundry, UC Berkeley, Univ. of Illinois, UTEP Electronic and Thermal properties of semiconductor nanostructures: A modeling and simulation study Abhijeet Paul Network for Computational Nanotechnology (NCN), Electrical and Computer Engineering Purdue University email: [email protected] Acknowledgements • Overall guidance and direction » Prof. Gerhard Klimeck, Prof. Mark Lundstrom, Purdue University, USA. » Prof. Timothy Boykin, University of Alabama at Huntsville, USA (PhD committee member). » Prof. Leonid Rokhinson, Purdue University, USA (PhD committee member). • Theory and Code development » Dr. Mathieu Luisier, ETH Zurich, Switzerland (OMEN/OMEN-BSLAB development). » Prof. Timothy Boykin, University of Alabama Huntsville, USA (Tight-Binding and solid state phys. theory) » Dr. Neophytos Neophytou, TU Wien, Austria (Initial MATLAB codes) • Discussions and work » Saumitra Mehrotra, Parijat Sengupta, Shuaib Salamat, Sunhee Lee, Lang Zeng, Mehdi Salmani, Kai Miao, Dr. Raseong Kim and Changwook Jeong, Purdue University. • .Experimental Collaborators » Dr. Giuseppe Tettamanzi, TU Delft, Netherlands, Shweta Deora, IIT Bombay, India, Dr. Subash Rustagi, IME, Singapore, Dr. Mark Rodwell, UCSB, USA. • Summer Undergrad students (for nanohub tools) » Junzhe Geng, Victoria Savikhin, Mohammad Zulkifli, and Siqi Wang, Purdue University. • Funding and Computational Resources » MSD-FCRP, SRC, NSF and MIND for funding. » NCN and nanoHUB.org for computational resources. Abhijeet Paul 2 PhD timeline and progress Important experimental works that guided this PhD work. [A] N. Singh et. al, EDL 2006 [B] A. Hochbaum et. al, Nature, 2008 Abhijeet Paul [C] Yu et. al, Nature, 2010. [D] Pernot et. al, Nature, 2010. 3 Outline of the talk • Motivation » Why the present work is important ? » Need for integrated atomistic simulation framework • Computational modeling and simulation approaches. • Application of the methods to Si nanowires (SiNWs). • Application to non-Si system GaAs a quick look !! • Global dissemination of findings nanoHUB.org • Summary • Future directions Abhijeet Paul 4 How to get more ??? Baseline CMOS: CPU, Memory, Logic More Moore(MM) Beyond Si More than Moore(MtM) Beyond CMOS 90 nm 65 nm Analog RF Thermo electricity Sensor Bio-chips Added Functional Diversity: More interaction 45 nm 32 nm 22 Faster nm processing and better interaction with environment holds the key to next-gen technologies. MM and MtM are the solutions !!! Abhijeet Paul 5 CMOS scaling challenges CMOS challenges ITRS Intel New device structure SiNW FET New Materials Next-gen CMOS scaling solutions More Moore Abhijeet Paul 6 Why thermoelectricity ??? Nasty Problems IEA, WEO, 2008 Green energy Production by thermoelectricity Gelsinger et. al ISSCC 2001 On chip thermoelectric cooling (BiTe SL) Automobile waste heat thermoelectric power generation DEER Choudhary et. al, Nature nano. (2009) www.tellurex.com Green Solutions from thermoelectricity More than Moore Abhijeet Paul 7 Dimensional Scaling: CMOS III-V FET IBM Graphene SiNW FET CNT-FET High-K MG Abhijeet Paul 3D FETS High-k Metal Gate Strain Technology SiGe strained ? ? ? 8 Non-Si 3D FETs are a solution Dimensional scaling: Thermoelectricity Electronic structure in nanostructures? Atomic scale interface treatment ?? BiTe,PbTe Bulk ZT ~1 Phonons in nanostructures ?? Treatment of alloys at atomic level ?? ??? ?? ? electronic and thermal properties BiTe/PbTe must !! Abhijeet Paul Dresselhaus et. al, DOS engg. (Bi,Sb),(Te,Se), PbTe, Phonon Glass Electron crystal Begin Semiconductor use PbTe Ddots ZT > 3 LAST Understanding of<nano-scale 1< ZT 3 Qwell Superlattice Si /SiGe NW SL Si Nanowires SiGe/Si QDot Superlattice 9 Need for Atomic level modeling… Material variation at atomic scale Quantum Dot Intel SiGe pMOSFET IEDM 2010 Atomic scale strain variation Si n-FinFET IMEC H=65nm,W=25nm G. Tettamanzi et. al, EDL, 2009. Abhijeet Paul Ultra-scale geometry with finite atoms http://www.xray.cz/xray/csca/ kol2010/abst/cechal.htm An increasing need for atomic scale modeling to simulate ultra-scaled devices!!! 10 Need for integrated device modeling … Treatment of multiple materials SiO2 Treatment of multiple valleys SiGe Si Treatment of multiple particles An increasing need for integrated modeling to handle complex issues in device modeling !!! Electron current Abhijeet Paul Phonons 11 ITRS on the future device modeling ... General , accurate, computationally efficient and robust quantum based simulators incl. fundamental parameters linked to electronic bandstructure and phonon spectra. Physical models for novel materials eg. High-k stacks, Ge and compound III/V channels: … Morphology, Bandstructure, defects/traps,etc. Physical models for stress induced device performance. Treatment of individual dopant atoms and traps… Need for an integrated approach to model material, electronic and lattice properties at the atomic scale. Abhijeet PaulITRS 2010, chapter 9, http://www.itrs.net 12 Outline of the talk • Motivation » Why the present work is important ? » Need for integrated atomistic simulation framework • Computational modeling and simulation approaches. • Application of the methods to Si nanowires (SiNWs). • Application to non-Si system GaAs a quick look !! • Global dissemination of findings nanoHUB.org • Summary • Future directions Abhijeet Paul 13 How to study the nano-scale devices? Atomistic Tight-binding (TB) model Bottom-up Approach To nano-scale devices Carrier Transport Abhijeet Paul 14 Atomistic Tight binding Approach FEATURES/ADVANTAGES Nearest neighbor Assemble TB Hamiltonian atomic bond model with spin orbit (SO) coupling. Based on localized atomic orbital treatment. Appropriate for treating Crystal structure atomic level disorder. Strain treatment at atomic level. Orbital Structural and material Y <100> Interaction variation treated easily. <111> Potential variations can Z accounted (easily). Atomisticbe Tight Binding for (TB) (x)<110> A reliable way to calculate electronic Structure structure in ultra-scaled structures. 15 Abhijeet Paul 15 Bulk Bandstructure using Tight-binding Si Rocksalt Se Pb Lent et. al, Superlat. and Microstruc., 1986 Zincblende sp3d5s*-SO model X CB L Γ VB L sp3d5-SO model L Atomistic Tight-Binding method A robust and accurate electronic structure model Abhijeet Paul 16 Application of TB to FETs: Charge-potential self-consistent approach Schrodinger-Poisson self-consistent solution Electron transport analysis in nano-scale FETs. Abhijeet Paul 17 Experimental validation of 2D atomistic Schrodinger-Poisson simulator Collaboration between Purdue University & Institute of Microelectronics, Singapore (2007-08). TEM image of Experimental SiNW FET Self-consistent Simulation Schrodinger using TB 4505 atoms potential 2D FEM Poisson solution Device Dimensions: Tox = 9nm W = 25nm H = 14 nm Source/Drain doping : nSelf-consistent simulation type ,1e20cm-3 Intrinsic <100> oriented Silicon channel. Abhijeet Paul charge of realistic devices using parallel C/C++ code. ~20K FEM elements 18 Experimental validation of atomistic simulator contd. Self-consistent Simulation Terminal CV benchmarking Good matching Electron charge distribution Simulator benchmarked !!! Quantum mechanical simulations for realistic FETs possible. Impact: Work published in IEEE, EDL VOL. 30, NO. 5,MAY 2009. p.526 Electrical Potential Distribution. Abhijeet Paul 19 How to study the nano-scale devices? Modified Valence Force Field (MVFF) model Atomistic Tight-binding (TB) model Bottom-up Approach To nano-scale devices Carrier Transport Abhijeet Paul 20 Phonon dispersion calculation: Modified VFF (MVFF) model [A] Old Keating Model [1] [B] Δr Short Range Δθ Bond-bending(β) Bond-stretching(α) [C] [F] Δr Long Range Coulomb interaction Cross-bond stretch bend (γ) [2] Zunger et. al. 1999 Δθ Imp. for polar materials [2] Imp. For polar materials [2] [E] [D] Δr1 Δr2 Cross bond Stretching (δ) Δθ2 Δθ1 New combination of Interactions: Modified Valence Force Field Calculate phonons in zinc-blende materials. Coplanar bond bending(τ) Imp. for non-polar materials Abhijeet Paul ([3] Sui et. al, 1993) [1] Keating. Phys. Rev. 145, 1966. [2] PRB, 59,2881, 1999. [3] PRB, 48, 17938,1993 21 What is the need for a new phonon model?? Over estimates optical modes Keating VFF Model Bulk Si Expt. (dots) [1] Bulk Si Expt. (dots) [1] Over estimates acoustic modes at zone edges. Expt. Data[1], inelastic neutron scattering (80K and 300K). Abhijeet Paul New MVFF model matchs the dispersion very well in the entire Brillouin zone !!! Accurate phonon model crucial for correct calculation of phonon dispersion in nanostructures. [1] Nelsin et. al, PRB, 6, 3777, 1972. 22 Phonon dispersion in free-standing nanowires 2 branches 1 branch 1D periodic [100] Si nanowire structure. [100] free Surface atoms free to standing SiNW vibrate. Bulk Si 6 branches 1 branch 2 branches Lot of flat bands (zero velocity) resulting in phonon confinement. qx [norm.] X Strong phonon confinement responsible for different lattice properties in SiNWs compared to bulk. Abhijeet Paul 23 Approaches to study the nano-scale devices Modified Valence Force Field (MVFF) model Atomistic Tight-binding (TB) model Bottom-up Approach To nano-scale devices Carrier Transport Landauer’s model (LM) Abhijeet Paul 24 How to analyze thermoelectric properties of materials ? Tc V1 O U T Ie Th Material A IQ IN Material B V2 Ie Steady-state linear thermoelectric (Onsager’s) relations [1,2] Electric current I e G.V GS .T Landauer’s Formula can be used to evaluate the transport parameters Heat current I Q GST .V S 2GT .T kB T V q T T V V1 V2 , T Th Tc , T Th Th 2 , e l Abhijeet Paul [1] L. Onsager, Phys. Rev. 37 405 (1931). [2] G. D. Mahan, Many-body Physics. 25 Goodness of thermoelectric materials: Figure of Merit (ZT) Generation of potential difference due to applied temperature difference`Seebeck Coefficient’. V S T Measure of thermoelectric power generation (High) GS 2T ZT l e Measure of charge flow (High) High ZT large G Abhijeet Paul V T T Measure of thermoelectric cooling (High) ZT = ‘Thermoelectric Figure of Merit’ by Ioffe in 1949. S2G = Electronic Power Factor (PF) Ability of material to conduct electricity `Electrical Conductance’ I G V Generation of temperature difference due to applied potential difference `Peltier Coefficient’ Ability of material to conduct heat energy `Thermal Conductance’ 1 Q T d Measure of heat flow (Low) Both electrons (ke)and lattice(kl) carry heat. large S and small κ desired !!! 26 Calculation of thermoelectric parameters G,S κe κl (Electronic) (Lattice) Pre- factor f (L ) e /l m Landauer’s Integral Under zero current condition GL e 0 l L S L /L e 1 l 1 e 0 Landauer’s approach A suitable approach to calculate thermoelectric transport parameters in nanostructures. Abhijeet Paul 27 A closer look at electrons and phonons L l m max 0 ph ( ) FBE ( ) M ( )d L T m Both need e/l m •No. of modes, M(E). •Mean free path (λ). L Electrons need E Ef e Lm k BT Etop Phonon Integral Phonons need •No Fermi Level •Bose Einstein distribution (bosons!!) • M(ω) Phonon dispersion. Accurate electronic & phonon dispersions must !!!. •Moment calculation near Fermi Level •Fermi Dirac distribution (fermions!!) •M(E) Electronic bandstructure. m el ( E ) FFD ( E ) M ( E )dE L E Abhijeet Paul Electron Integral 28 The complete approach set Modified Valence Force Field (MVFF) model Atomistic Tight-binding (TB) model Electronic Properties Bottom-up Approach To nano-scale devices Thermal Properties Carrier Transport Landauer’s model (LM) An ‘integrated approach’ to study electronic, physical and thermal properties of nanostructures !!! Abhijeet Paul Thermoelectricity 29 Outline of the talk • Motivation » Why the present work is important ? » Need for integrated atomistic simulation framework • Computational modeling and simulation approaches. • Application of the methods to Si nanowires (SiNWs). • Application to non-Si system GaAs a quick look !! • Global dissemination of findings nanoHUB.org • Summary • Future direction Abhijeet Paul 30 Silicon nanowires (SiNW): The vast potential Batteries [A] Explosive -sensor [E] Solar cells [B] Cathode Li2S SiNW Anode SiNW SiNWs have versatile applicationsThermoelectricity [D] and Silicon are highly compatible to CMOS. nanowire Interesting system to study!!! Transistors [C] Abhijeet Paul [A] Yang et. al, 2010, Nanoletters. [B] Kalzenberg et. al, 2008, Nanoletters. [C] Chin et. al, 2009, IEEE, TED. [D] Hochbaum et. al, 2008, Nature. [E] Patlosky et. al, 2010, Verlag, Germany. 31 Nanoscale solutions in SiNWs Physical metrology How to determine size, shape and orientation ? ? Electrical metrology How to determine interface traps in SiNW FETs? Silicon nanowire Thermoelectricity How to enhance PF and ZT of SiNW ? Abhijeet Paul Thermal properties How to engineer thermal properties of SiNW ? 32 Peeking into the channel of Si trigated n-FinFETs Collaboration between Purdue University ,TU Delft, Netherlands and IMEC, Belgium (2009-2011). TEM image of tri-gated n-FinFETs Active Area(SAA) Experiment Temperature Based G-V Sub-threshold measurement about From intercept Where do the charges flow ? How easily charges go from thermionic current provides information source to channel? Channel undoped channel Si FinFETs !!! From slope Barrier source Height (Eb) Abhijeet Paul 33 Trends of Eb and SAA in Si n-FinFET: Experiment vs. Simulation Eb and SAA decrease with Vgs volume to surface inversion Experimental Results Good match !! Simulation Approach Schrodinger Eq.: 20 band sp3d5s* model with spin orbit coupling for Si. Simulated Tri-gated Si n-FinFET ρ(r) V(r) 2D-Poisson Solution Simulations give good qualitative match !! What Performed is the reason using for mismatch in SAA ? OMEN-3Dpar Channel with ~44K atoms (support from Sunhee Lee) Abhijeet Paul 34 ??? Mismatch in SAA : Interface trap density (Dit) extraction 3D FinFETs bad sidewall etch [1] interface traps gate screened from channel mismatch in SAA A B No H2 anneal More mismatch!! ~2X Difference in expt. and simulated SAA Dit extraction From Method 1 A. Paul et. al, JAP, 2011 Charge Neutrality H2 anneal reduce traps by ~2X. Abhijeet Paul [1] Kapila et. al, IEEE, EDL, 2008 35 Mismatch in Eb : Interface trap density (Dit) extraction Eb (meV) 3D FinFETs Eb bad sidewall etch [1] Vg interface traps gate screened Gate to Channel coupling. from channel Suppressed by interface mismatch in Eb traps H2 anneal A.Paul et. al, JAP, 2011 H2 anneal Dit ~18.1x1011#/cm2 [100] Difference in expt. and simulated α Dit extraction Dit Method 2 11 ~10.3x1011#/cm2 2 Dit ~15.3x10 #/cm [110] sidewall Dit > [100] sidewall Dit. [110] Gate Voltage Abhijeet Paul(V) 36 Physical metrology How to determine size, shape and orientation ? ? Conductance Electrical metrology Measurement How to determine and interface traps in SiNW simulations. FETs? Silicon nanowire Thermoelectricity How to enhance PF and ZT of SiNW ? Abhijeet Paul Thermal properties How to engineer thermal properties of SiNW ? 37 2 types of shifts Bulk Material Nanostructure (NS) Intensity (a.u) Info on size, dimensionality, crystallanity Phonon shifts of nanostructures Frequency(ω) Phonon Shift Raman Spectrometer Frequency(ω) Frequency (cm-1) Physical Metrology Raman Spectroscopy: A primer Acoustic Phonon shift q Optical Phonon shift q opt / ac NS opt / ac ∆ω > 0 Blue-shift information ∆ωabout < 0 Red-shift provide vital Physical properties of nanostructures!!! Abhijeet Paul Bulk opt / ac 38 Phonon shifts: Experimental benchmarking. Acoustic hardening or blue-shift in SiNWs Acoustic d <1 for 1D. A >0 Optical softening or red-shift in SiNWs MVFF compares with expts. very well Optical MVFF provides correct trend for d >1 phonon shifts ‘A’ and ‘d’ correlation can connect tofor 1D. d SiNW shape A<0 a0 Connects to the shape of the nanowire in 1D Abhijeet Paul A W Connects to dimensionality of NS 39 Physical metrology of SiNWs a0 A W d SiNW ‘A’shapes and ‘d’ under from study acoustic and optical phonon shifts correlate to SiNW shape nanoscale metrology Abhijeet Paul 40 Physical metrology How to determine size, shape and orientation ? Raman spectroscopy Phonon shift in SiNWs Conductance Electrical metrology Measurement How to determine and interface traps in SiNW simulations. FETs? Silicon nanowire ? Thermoelectricity How to enhance PF and ZT of SiNW ? Abhijeet Paul Thermal properties How to engineer thermal properties of SiNW ? 41 Need for tuning material thermal properties Heat Source A B Equivalent thermal circuit Heat Flow Thermoelectric device Thermal Capacitance Cth V CV Thermal Resistance Heat Sink Better Laser Cooling A Rth th L Better Heat evacuation in FETs. Improved ZT in thermoelectric devices Engineering material thermal properties can improve system performance!!! Abhijeet Paul 42 Strain: Tuning thermal conductivity of SiNWs Simulation MVFF Set-up Expt. Result A. Paul et. al, APL, 2011. Gan et.al Purdue University Abhijeet Paul MVFF simulations show similar tuning for thermal conductivity with strain. 43 Engineering κl using strain in SiNW κl increases under compressive uniaxial strain Low and mid range bands responsible. Uniaxial strain tunes κl more than hydrostatic strain in SiNWs!! Energy Spectral Contribution κl κl is weakly sensitive to hydrostatic strain Low and high bands oppose mid bands overall negligible change Abhijeet Paul Phonon energy range 0 -22 meV Low 22-44 meV Mid 44-65 meV High Strain type Compressive Tensile (-2%+2%) Uniaxial 36%34% 52%50% 12%13% Hydrostatic 32%37% 56%45% 11%16% 44 Tuning Specific heat (Cv) of SiNWs using strain Uniaxial strain brings neglible change to Cv Hydrostatic strain brings large change to Cv Very less change Hydrostatic strain tunes Cv more In energy contribution under strain in SiNWs !!! strain Abhijeet Paul Higher energy bands contribute to the change in Cv. than uniaxial 45 Conductance Electrical metrology Measurement How to determine and interface traps in SiNW simulations. FETs? Physical metrology How to determine size, shape and orientation ? Raman spectroscopy Phonon shift in SiNWs Thermoelectricity How to enhance PF and ZT of SiNW ? Abhijeet Paul Silicon nanowire ? Strain tunes Phonon thermal properties Thermal properties How to engineer thermal properties of SiNW ? 46 Porous crystalline Si for thermoelectricity Electrical Conductivity[1] Hopkins et.al Nano. Lett., 2011. ~1.5X Drop Tang et.al Nano Lett., 2010. Yu et. al Nature Porous Nanotech. 2010 ~8X Reduction Experimental results Silicon an attractive alternative for RT thermoelectric material. Thermal SiNWs ? How about porous Experimental structures Abhijeet Paul Conductivity[1] [1] Yu et. al Nature Nanotech., 2010. 47 Electronic and Phonon dispersion: Porous SiNW Hollow SiNW: [100], W=4nm Tight Binding Increase in Ec more confinement Rh=0.4 nm Dsep=0.2 to 1 nm flat bands Increased electron andMore phonon confinement in Suppression of porous SiNWs compared to filled nanowire. heat flow. MVFF Abhijeet Paul 48 Porous SiNWs: Electronic and lattice contribution to ZT Solid nanowire Electron and Phonon dispersion PF (S2G) reduction ~49% ~7% drop ~35% drop Electrical and thermal transport parameters Landauer’s method with scattering kl reduction ~55% 2 GS ZT T ( e l ) Thermoelectric Interplay ofEfficiency PF and κl determine the final ZT !!! Abhijeet Paul 49 ~55% drop Porous SiNW: Power-factor and ZT ~7% rise ~49% drop Large reduction in Electrical power-factor due to pores. ZT improves due to large suppression on lattice thermal conductivity. ZT in porous SiNW improves but at the expense of electrical performance !!! Abhijeet Paul 50 Physical metrology How to determine size, shape and orientation ? Conductance Measurement and simulations. Electrical metrology How to determine interface traps in SiNW FETs? Raman spectroscopy Phonon shift in SiNWs Integrated modelingSilicon approach sheds light on nanowire many nano-scale aspects of SiNWs. Phonons Lattice thermal properties Thermoelectricity Porous SiNW How to enhance PF Enhance ZT and ZT of SiNW ? Abhijeet Paul Thermal properties How to determine thermal properties of SiNW ? 51 Key new findings and accomplishments • Developed two new interface trap metrology methods in Si trigated FinFETs. »Methods are complimentary and repeatable. (Published in JAP, 2011, IEEE EDL 2010, IEEE EDL 2009) • Correlated the shape and size of SiNWs to phonon shifts guides Raman Spectroscopy. (Accepted in JAP 2011) • Strain engineering of lattice thermal conductivity and specific heat of SiNWs possible. (Published in APL, 2011) • Possibility of using porous SiNWs for enhanced ZT (~6% rise) at room temperature shown. Abhijeet Paul 52 Outline of the talk • Motivation » Why the present work is important ? » Need for integrated atomistic simulation framework • Computational modeling and simulation approaches. • Application of the methods to Si nanowires (SiNWs). • Application to non-Si system GaAs a quick look !! • Global dissemination of findings nanoHUB.org • Summary • Future directions Abhijeet Paul 53 GaAs nanostructures: Electronic and thermoelectric enhancement [100]/(100) A. Paul et. al, IEEE DRC, 2011 ~38% inc. in ION for 4% strain p-type. SiNW ~10% inc. in ZT for Integrated tensile strain n-type modeling performance enhancement of GaAs nanostructures. 0% 2% 5% A. Paul et. al, IEEE Nano, 2011 Ga GaAs kl = 1W/m-K [1] GaAs NW Abhijeet Paul [1] Martin et al, Nanoletters, 10, 2010 54 Outline of the talk • Motivation » Why the present work is important ? » Need for integrated atomistic simulation framework • Computational modeling and simulation approaches. • Application of the methods to Si nanowires (SiNWs). • Application to non-Si system GaAs a quick look !! • Global dissemination of findings nanoHUB.org • Summary • Future directions Abhijeet Paul 55 Global scientific outreach using nanoHUB.org Research Tools BandStructure Lab Most popular tool on nanoHUB. Over 3K users. Till now ran 34503 simulations. Has been cited 28 times in research. Abhijeet Paul LANTEST Tool •C/C++ and Matlab based tools. •Enables research in electronic structure and thermoelectricity Open research tool for fellow researchers !!! 56 Global semiconductor education using nanoHUB.org Semiconductor Educational Tools Crystal Viewer Tool Periodic Potential lab • 6 C/C++ and MATLAB based semiconductor physics tools developed. •Used in EE305 (Semiconductor Introduction) at Purdue University Users (last 12 months) = 887 Simulations (last 12 months) ~3K Enabled dissemination of device physics knowledge globally. Abhijeet Paul 57 Outline of the talk • Motivation » Why the present work is important ? » Need for integrated atomistic simulation framework • Computational modeling and simulation approaches. • Application of the methods to Si nanowires (SiNWs). • Application to non-Si system GaAs a quick look !! • Global dissemination of findings nanoHUB.org • Summary • Future directions Abhijeet Paul 58 Summary • An integrated modeling approach developed to study nanoscale devices. • SiNWs : »Electrical metrology trap extraction method. »Structural metrology Raman spectroscopy phonon shift »Thermal property tuning Phonon confinement. »Thermoelectricity Porosity control. Abhijeet Paul 59 Summary • GaAs: »Compressive strain and body scaling enhances ION of UTB pFETs. »Tensile strain and orientation enhances ZT of GaAs nanowires. • Global outreach for research using nanoHUB.org. Abhijeet Paul 60 Outline of the talk • Motivation » Why the present work is important ? » Need for integrated atomistic simulation framework • Computational modeling and simulation approaches. • Application of the methods to Si nanowires (SiNWs). • Application to non-Si system GaAs a quick look !! • Global dissemination of findings nanoHUB.org • Summary • Future directions Abhijeet Paul 61 Future directions • Combining electrons and phonons for better eletro-thermal understanding in nano-scale devices. http://www.comsol.com/papers/6801/ • Increased device to system level interaction for better design optimizations. Abhijeet Paul 62 Future directions • Inclusion of thermodynamics into phonon calculations. Lattice thermal expansion Si bulk http://www.ioffe.ru/SVA/NSM/Semicond/Si • Investigation of source to drain tunneling for performance evaluation of ultra-short MOSFETs. Abhijeet Paul 63 Thank you!!! Abhijeet Paul 64 Appendix A • References for Acoustic phonon shift »Si-1/Si-2: T. Thonhauser et. al, PRB, 69, 2004. (T) »Si-3: Hepplestone et. al., APL, 87, 2005. (T) • References for Optical phonon shift: »Si-1: Hepplestone et. al., APL, 87, 2005. (T) »Si-2: K. Adu et. al, App. Phys. A, 85, 2006. (E) »Si-3: Sun et. al, PRB, 72, 2005. (T) »Si-4: Campbell et. Al, Solid State Comm., 58, 1986. (T) »Si-5: Zi et. Al, APL, 69, 1996. (T) »Si-6: Yang et. Al, Jour. Phys. Chem., 112, 2008. (E) »Si-7: Faraci et. Al, Journ. App. Phys., 109, 2011. (T) T = Theory , E = Expt. Abhijeet Paul 65