Lecture #32 OUTLINE The MOS Capacitor: • Capacitance-voltage (C-V) characteristics Reading: Chapter 16.4 Spring 2007 EE130 Lecture 32, Slide 1

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Transcript Lecture #32 OUTLINE The MOS Capacitor: • Capacitance-voltage (C-V) characteristics Reading: Chapter 16.4 Spring 2007 EE130 Lecture 32, Slide 1

Lecture #32
OUTLINE
The MOS Capacitor:
• Capacitance-voltage (C-V) characteristics
Reading: Chapter 16.4
Spring 2007
EE130 Lecture 32, Slide 1
fS and W vs. VG (p-type Si)
2fF
f S:
2
qN A si 
2Cox (VG  VFB ) 
 1
fs 
 1
2
qN A si
2Cox 

0
WT 
0
accumulation
Spring 2007
(for VFB  VG  VT )
VG
accumulation V depletion V inversion
FB
T
W:
2
2ε Si (2fF )
qN A
2
2 SifS  Si 
2Cox (VG  VFB ) 
 1
W

 1 (for VFB  VG  VT )
qNA
Cox 
qNA si


VFB depletion VT inversion
EE130 Lecture 32, Slide 2
VG
Total Charge Density in Si, Qs
Qacc  Cox (VG  VFB )
depletion
0
accumulation
VFB
accumulation
inversion
VT
depletion
inversion
0
VFB
VG
depletion
0
inversion
VFB
VT
VG
VT
Qinv
slope = -Cox
Qinv  Cox (VG  VT )
Spring 2007
depletion
VG
inversion
0
VFB
accumulation
VT
Qdep  qNAW
accumulation
Qs  Qacc  Qdep  Qinv
VG
EE130 Lecture 32, Slide 3
MOS Capacitance Measurement
• VG is scanned slowly
• Capacitive current due
to vac is measured
iac
GATE
vac
Si
C-V Meter
Spring 2007
MOS Capacitor
EE130 Lecture 32, Slide 4
dv ac
iac  C
dt
dQGATE
dQs
C

dVG
dVG
MOS C-V Characteristics (p-type Si)
accumulation
depletion
inversion
VG
VFB
VT
dQs
C
dVG
Qinv
C
slope = -Cox
Cox
Ideal C-V curve:
VG
VFB
accumulation
Spring 2007
EE130 Lecture 32, Slide 5
VT
depletion
inversion
Capacitance in Accumulation (p-type Si)
• As the gate voltage is varied, incremental charge is
added/subtracted to/from the gate and substrate.
• The incremental charges are separated by the gate oxide.
M
O
S
DQ
Q
dQacc
C
 Cox
dVG
-Q
DQ
Cox
Spring 2007
EE130 Lecture 32, Slide 6
Flat-Band Capacitance
• At the flat-band condition, variations in VG give rise to
the addition/subtraction of incremental charge in the
substrate, at a depth LD
• LD is the “extrinsic Debye Length”
– characteristic shielding distance, or the distance where the
electric field emanating from a perturbing charge falls off by
a factor of 1/e
LD 
Cox
CDebye
Spring 2007
 Si kT
2
q NA
1
1
LD


CFB Cox  Si
EE130 Lecture 32, Slide 7
Capacitance in Depletion (p-type Si)
• As the gate voltage is varied, the width of the depletion
region varies.
 Incremental charge is effectively added/subtracted at a
depth W in the substrate.
M
DQ
Q
O
S
C
W
dQdep
dVG
2(VG  VFB )
1


2
qN A Si
Cox
DQ
-Q
1
1
1
1 W




C Cox Cdep Cox  Si
Cox Cdep
Spring 2007
EE130 Lecture 32, Slide 8
Capacitance in Inversion (p-type Si)
CASE 1: Inversion-layer charge can be supplied/removed
quickly enough to respond to changes in the gate voltage.
 Incremental charge is effectively added/subtracted at the
surface of the substrate.
DQ
M
O
S
WT
DQ
Time required to build inversion-layer
charge = 2NAto/ni , where
to = minority-carrier lifetime at surface
dQinv
C
 Cox
dVG
Cox
Spring 2007
EE130 Lecture 32, Slide 9
Capacitance in Inversion (p-type Si)
CASE 2: Inversion-layer charge cannot be supplied/removed
quickly enough to respond to changes in the gate voltage.
 Incremental charge is effectively added/subtracted at a
depth WT in the substrate.
1
1
1


C Cox Cdep
DQ
M
O
S
WT
DQ
Cox Cdep
Spring 2007
1 WT


Cox  Si
1
2(2fF )
1



Cox
qN A Si C min
EE130 Lecture 32, Slide 10
Supply of Substrate Charge (p-type Si)
gate
gate
Accumulation:
Depletion:
Cox
Cox
+ + + + + +
C dep
p-type Si
p-type Si
Inversion:
Case 1
Case 2
gate
gate
Cox
N+
- - - - - -
Cox
DC
- - - - - Cdep,min
-
DC and AC WT
p-type Si
Spring 2007
EE130 Lecture 32, Slide 11
AC
WT
p-type Si
W
Capacitor vs. Transistor C-V
(or LF vs. HF C-V)
p-type Si:
C
MOS transistor at any f,
MOS capacitor at low f, or
quasi-static C-V
Cmax=Cox
CFB
MOS capacitor at high f
Cmin
accumulation
Spring 2007
VFB
depletion
VT
EE130 Lecture 32, Slide 12
inversion
VG
Quasi-Static C-V Measurement
C
p-type Si:
Cmax=Cox
CFB
Cmin
accumulation
VFB
depletion
VT
inversion
VG
The quasi-static C-V characteristic is obtained by slowly ramping the
gate voltage (< 0.1V/s), while measuring the gate current IG with a very
sensitive DC ammeter. C is calculated from IG = C·(dVG/dt)
Spring 2007
EE130 Lecture 32, Slide 13
Deep Depletion
• If VG is scanned quickly, Qinv cannot respond to the
change in VG. The increase in substrate charge
density Qs must then come from an increase in
depletion charge density Qdep
 depletion depth W increases as VG increases
 C decreases as VG increases
C
Cox
Cmin
VFB
Spring 2007
VT
EE130 Lecture 32, Slide 14
VG