Transcript THUMB Instructions: Branching and Data Processing Thomas Clark, Charlie Phipps, Samir Thakral.

THUMB Instructions:
Branching and Data Processing
Thomas Clark, Charlie Phipps, Samir Thakral
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Outline
□ Review of THUMB Instruction Set
□ THUMB Branch Instructions
□ THUMB Data Processing Instructions
□ Conclusion/Wrap-up
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THUMB Review
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THUMB Instruction Set
□
Compressed, 16-bit subset of the ARM instruction set
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Used to increase code density and in some cases,
performance and power-efficiency
□
Not a complete architecture: all processors that support
THUMB also support ARM
□
THUMB instructions have a restricted view of registers
■
□
Registers R0 through R7 are for general purpose use
Most THUMB instructions are 2-address format, opposed to
3-address format in ARM
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ARM vs. THUMB Comparison
ARM
□
□
□
□
32-bit instruction set
3-data address instructions
16 general purpose
registers
More regular binary
encoding
THUMB
□
□
□
□
□
□
16-bit instruction set
2-data address instructions
8 general purpose registers
Subset of ARM
instructions
Greater code density
If used correctly, can lead
to better performance/
power-efficiency
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THUMB Branch Instructions
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THUMB Branch Instructions
□ Include various forms of PC-relative branch and branch and
link instruction seen in ARM
□ Branch and Exchange instruction for switching between
ARM and THUMB instruction sets
□ ARM instructions have a 24-bit offset field which will not fit
in the 16-bit format.
□ THUMB instruction set includes various ways of subsetting
the functionality.
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THUMB Branch Instructions
Typical use of branch instructions include:
□ Short conditional branches to control loop exit
□ Medium-range unconditional branches to ‘goto’ sections of
the code
□ Long-range branches for subroutine calls
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THUMB Branch Instructions
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THUMB Branch Instructions
□ First two formats show how the condition field is traded off
against the offset length.
□ Condition field in the first format is the same as that in all the
ARM instructions
□ The first two formats are shifted one-left bit and sign
extended to 32 bits
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THUMB Branch Instructions
□ Branch and link subroutine needs long-range, which is
difficult within 16-bit range
□ THUMB uses two instructions to give a combined 22-bit halfword offset sign extended to 32 bits
□ The range of instruction is +/- 4 Mbytes.
□ Instructions are made independent by using interrupt and
using link register as temporary memory.
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THUMB Branch Instructions
□ ‘oldPC’ -> address of second instruction
□ Return address has two bytes added to point to the next
instruction
□ Bottom bit is set to indicate that the caller is a THUMB
routine
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THUMB Branch Instructions
□ Fourth format maps directly onto to the B {L} X instructions
□ r14 is set to the following instruction plus 1, indicating the
caller was THUMB code.
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Thumb Branch Assembler Formats
□Branch
B<cond> <label> ; format 1
B
<label> ; format 2
□Branch
– Thumb target
– Thumb target
with Link
BL
<label> ; format 3
□Branch
– Thumb target
with Link and eXchange
BLX
<label> ; format 3a – ARM target
B{L}X
Rm
; format 4
– ARM or Thumb target
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Conditional Branch
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Conditional Branch
□Format
1 - Conditional Branch
B<cond> <label> ;
example:
.thumb
Start:
MOV R0, #50
MOV R1, #5
MOV R2, #20
……
Loop:
SUB R0, R0, R1
……
CMP R0, R2
BGE Loop
;subtract 5 from
;branch to loop if R0 is >= 20
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Unconditional Branch
□Format
B
2 - Unconditional Branch
<label> ;
example:
.thumb
orange:
……
B apple
……
apple:
……
B orange
……
; branch to apple
; branch to orange
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Branch with Link
□Format
BL
3 - Branch with link
<label> ;
example:
.thumb
Loop:
MOV R0, #50
MOV R1, #5
SUB R3, R0, R1
……
BL Surprise
branch
……
Surprise:
……
BX r14
.end
;branch to Surprise and save addr after
; return to instruction after branch
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Branch with Link and Exchange
□Format
3a Only available in architecture v5T
BLX
example:
.thumb
……
BLX GREEN
……
.arm
……
GREEN:
……
BX r14
branch
<label> ;
; branch to function GREEN
; Return to instruction after
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Branch Exchange
□Format
B{L}X
4 - Branch Exchange with optional link
Rm
;
example 1:
(only architecture v5T)
.arm
……
LDR r0, =RED+1
addr of BLUE and
MOV r14, pc ; save addr
to indicate Thumb
BX r0
……
.thumb
RED:
……
BX r14 ;
example 2:
.arm
……
LDR r0, = BLUE+1 ;get
BLX r0
in LR
+1
……
.thumb
BLUE:
……
BX lr
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THUMB Subroutines
Theses branching formats allow us to have subroutine calls
to functions in either instruction set
□
□
How?
B<cond> <label> ; format 1
B
<label> ; format 2
BL
<label> ; format 3
– Thumb target
– Thumb target
– Thumb target
BLX
<label> ; format 3a – ARM target
B{L}X
Rm
; format 4
– ARM or Thumb target
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THUMB Subroutines
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THUMB Data Processing Instructions
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Data Processing Instructions
□
Enable the programmer to perform arithmetic and logical
operations on data values in registers
□
Only instructions to modify data rather than move data
around or control the sequence of program execution
□
Typically require two operands and produce one result, but
there are several exceptions (negate, move shifted register,
etc.)
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THUMB Data Processing Instructions
□
More irregular formatting than standard ARM data
processing instructions
□
Most instructions set condition codes automatically,
compared to standard ARM instructions which must
explicitly be told to set condition codes
□
Shift operations are separate from general ALU functions
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Move Shifted Register
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Move Shifted Register
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ADD and SUBTRACT
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Immediate Instructions
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Logical/Additional Operations
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Hi Register Operations
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SP and PC Instructions
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Conclusion
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Overview
□ THUMB is a compressed, 16-bit subset of the ARM
instruction set
□ Branching instructions used for loops, jumps, and subroutine
calls
□ Data processing instructions allow for modification of data
using arithmetic and logical procedures
□ Compressed THUMB instructions create a less consistent
format
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QUESTIONS
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References
□
(2015). “ARM Architecture.” Wikipedia. Web. February 14, 2015.
http://en.wikipedia.org/wiki/ARM_architecture.
□
Furber, S. (2000). ARM system-on-chip architecture. Harlow, England: Addison-Wesley. (2014).
□
https://ece.uwaterloo.ca/~ece222/ARM/ARM7-TDMI-manual-pt3.pdf
□
http://en.wikipedia.org/wiki/ARM7
□
http://paulkilloran.com/arm/Lecture_7.pdf
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