Transcript (RMO2C – 2) 60-GHz PA and LNA in 90-nm RF-CMOS Terry Yao1, Michael Gordon1, Kenneth Yau1, M.T.

(RMO2C – 2)
60-GHz PA and LNA in 90-nm RF-CMOS
Terry Yao1, Michael Gordon1, Kenneth Yau1,
M.T. Yang2 and Sorin P. Voinigescu1
1University
of Toronto
2TSMC
Outline
•
•
•
•
•
•
Motivation
mm-Wave Actives and Passives
60-GHz LNA in 90-nm CMOS
60-GHz PA in 90-nm CMOS
Conclusions
Acknowledgments
60-GHz PA and LNA in 90-nm RF-CMOS
2
Motivation
• 60-GHz band:
 high atmospheric attenuation
 7-GHz of unlicensed spectrum 57-64GHz
• Applications:
 high data-rate wireless transmission
 mm-wave sensors
• Smaller on-chip passives  higher integration
 single-chip transceivers
• Technology scaling enables low-cost 60-GHz
radio SoCs in silicon
60-GHz PA and LNA in 90-nm RF-CMOS
3
60-GHz System Overview
• Classical radio architectures: simple, robust at
mm-waves
• Crucial front-end blocks: VCO, LNA, PA
Digital
Rx
BPF
LNA
IF
Downconvert
RF
Downconvert
IF
Amp
ADC
90°
LOI F
IF
Upconvert
T/R
Antenna
Switch
BPF
ADC
LORF
DAC
PA
LOI F
90°
Tx
RF
Upconvert
60-GHz PA and LNA in 90-nm RF-CMOS
DAC
4
mm-Wave Transistor Performance
• Measured gain of 90-nm n-MOSFETs (~8dB) is
comparable to that of SiGe HBTs (~10dB)
• Cascode exhibits higher gain than CS/CE stages;
benefits of MOS cascode diminish at >60GHz
60-GHz PA and LNA in 90-nm RF-CMOS
5
Key Biasing Ideas for LNAs and PAs
• Peak fT, fMAX and NFMIN characteristic current densities largely
unchanged across technology nodes and foundries
• NFMIN (0.15mA/µm) and peak fMAX (0.2mA/µm) are close 
LNAs simultaneously optimized for noise and high gain
• In CMOS PAs optimum current swing when biased at
0.3mA/µm
10%
degradation
in fMAX
Optimum
Current Swing
Bias
60-GHz PA and LNA in 90-nm RF-CMOS
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Key Enabler: Lumped mm-Wave Inductors and Transformers
• Reduced form factor of on-chip passives at mmwaves
• Spiral inductors preferred over CPW or µ-strip T-lines
• Vertically stacked, Xfmr measured up to 94GHz
• Inductors and Xfmrs modeled using ASITIC® >90%
accuracy
1:1 vertically stacked transformer in 90-nm CMOS
Measured transformer
power transfer up to 94GHz
60-GHz PA and LNA in 90-nm RF-CMOS
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Outline
•
•
•
•
•
•
•
Motivation
State-of-the-Art
mm-Wave Actives and Passives
60-GHz LNA in 90-nm CMOS
60-GHz PA in 90-nm CMOS
Conclusions
Acknowledgements
60-GHz PA and LNA in 90-nm RF-CMOS
8
mm-Wave LNA Design
• Cascode offers best isolation, low-to-moderate
noise, ease of matching, good linearity, high gain;
drawback is higher supply voltage
• Methodology based on:
Voinigescu et al., JSSC (Sept. ’97)
LS 
Zo
T (cascode)
LG 
1
 LS
2
 Cin
1
Z in  Z o  j ( LG  LS ) 
jC in
2
 fT  RP
G   
 f  Zo
VDD
RP
L
C
VOUT
VDD
VIN
ZSOPT=ZO
ZIN=ZO
60-GHz PA and LNA in 90-nm RF-CMOS
LG
Q2
Q1
LS
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60-GHz LNA in 90nm CMOS
• 2-stage cascode biased
at 0.2mA/µm (gain,
linearity and noise)
• Input/output matched
to 50Ω (accounting for
CPAD)
• No source degeneration
in 2nd stage for gain
• LM1 forms artificial t-line
with (Cgs2+Csb2) and
(Cdb1+Cgd1)
VDD= 1.5 V
LD1= 70 pH
Q2
RFOUT
Q4
CC1= 150 fF
LM1= 70 pH
LD2= 110 pH
CC2= 100 fF
LM2= 90 pH
RFIN
LG = 170 pH
Q1
LS1= 60 pH
Q3
20 k
Q1,Q2:30x1µm
Q3,Q4:40x1µm
VG
LM 1
1
LD1Q
Z o1 
 Z Q1,load Z o1  Z Q 2,in

C gs 2  Csb2
gm2 1  gm2 ro2
60-GHz PA and LNA in 90-nm RF-CMOS
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60-GHz LNA Fabrication
• 90-nm RF-CMOS with 9-metal
layers:
 fT/fMAX=140/170GHz
(Wf=2µm)
350µm
 fT/fMAX=120/200GHz
(Wf=1µm)
• Thick top metals M8 & M9
• Inductors: high Q, small area
• 2pF MIM capacitors for decoupling
• Large metal plane and ample
substrate contacts
• 350 x 400 µm2
400µm
Active area: ~180 x 300 µm2
60-GHz PA and LNA in 90-nm RF-CMOS
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60-GHz LNA Measurements
• Repeatability across dies
• Peak gain = 14.6dB (58GHz)
• Isolation > 32dB
• IIP3 = -6.8dBm (58GHz)
• NF = 4.5dB (simulated)
(confirmed by cascode meas. to
26GHz)
60-GHz PA and LNA in 90-nm RF-CMOS
12
LNA Comparison with State-of-the-Art
FoM LNA 
G  IIP 3  f
OIP 3  f
[ITRS]

( F  1)  P ( F  1)  P
LNA Technology
f
G
NF
IIP3
DC
Power
Area
FOM
160/160 GHz fT/fMAX
SiGe HBT [1]
65GHz
14dB
10.5dB
(sim)
-6dBm
34mW @
2.5V
0.3 x 0.4 mm2
1.2
200/290 GHz fT/fMAX
SiGe HBT [2]
61.5GHz
15dB
4.5dB
(meas)
-8.5dBm
10.8mW
@ 1.8V
0.6 x 0.9 mm2
13.8
90/130 GHz fT/fMAX
130nm CMOS [3]
60GHz
12dB
8.8dB
(meas)
-0.5dBm
54mW @
1.5V
1.3 x 1.0 mm2
2.1
140/170 GHz fT/fMAX
90nm CMOS [4]
58GHz
14.6dB
4.5dB
(sim)
-6.8dBm
24mW @
1.5V
0.35 x 0.4
mm2
8.1
[1] M. Gordon et al., SiRF ’06.
[2] B. Floyd et al., ISSCC ’04.
[3] C. Doan et al., ISSCC ’04.
[4] This work.
• First 60-GHz LNA in 90-nm CMOS
• Higher gain, lower NF, lower power dissipation,
smaller area than 130nm 60G LNA
• Design scalable in frequency and ported to
STM’s 90nm CMOS technology (60GHz
receiver submitted to CSICS 2006)
60-GHz PA and LNA in 90-nm RF-CMOS
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Outline
•
•
•
•
•
•
•
Motivation
State-of-the-Art
mm-Wave Actives and Passives
60-GHz LNA in 90-nm CMOS
60-GHz PA in 90-nm CMOS
Conclusions
Acknowledgements
60-GHz PA and LNA in 90-nm RF-CMOS
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Key mm-Wave PA Design Ideas
• Class A for maximum linearity
• Linear voltage swing decreases
with each new node
FoM PA  Pout  G  PAE  f 2 [ITRS]
I swing  (VDD  VDS , sat )
OP1dB 
4
• Current swing constant across
1
1
1
1
nodes



• Measured breakdown >3V OP1dBcascade OP1dB1  G2 OP1dB2  G3 OP1dB3
60-GHz PA and LNA in 90-nm RF-CMOS
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60-GHz PA in 90nm CMOS
• Class A, 3-stage CS topology
• Input/output match  50
• Branch currents scaled for optimal linearity
VDD= 1.5 V
LD1= 105 pH
LD2= 105 pH
CC1= 33 fF
RF IN
Q1
Input
Match
LS 
LG2 = 65 pH
VDD= 1.5 V
LS1= 96 pH
5k
LS2= 60 pH
Q2
5k
VG
Q1 : 32 x 1 µm
1-Stage
L-Match
at Output
LD3= 105 pH
CC3= 80 fF
CC2= 33 fF
LG3 = 65 pH
LG1 = 65 pH
Zo
T
VDD= 1.5 V
LS3= 60 pH
VG
Q2 : 36 x 1 µm
60-GHz PA and LNA in 90-nm RF-CMOS
Q3
RF OUT
Interstage
Match and
Degeneration
Q3 : 40 x 1 µm
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350µm
60-GHz PA Fabrication
Active area:
~350µm x 160µm
430µm
• Same 90-nm RF-CMOS process technology as 60-GHz
LNA
• Spiral inductors for matching  high area efficiency
60-GHz PA and LNA in 90-nm RF-CMOS
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60-GHz PA Measurements
• Repeatability across dies
• Peak gain = 5.2dB (60GHz)
• 3-dB BW > 13GHz (52-65GHz)
• S22, S11 both matched (60-65GHz)
• OP1dB = 6.4dBm, Psat = 9.3dBm
(60GHz)
• Maximum linearity and gain occur
at 0.28mA/µm
60-GHz PA and LNA in 90-nm RF-CMOS
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60-GHz PA Measurements
• Output compression proportional to supply voltage
• Maximum efficiency = 21.4%; maximum PAE = 7.4%
60-GHz PA and LNA in 90-nm RF-CMOS
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60-GHz PA Performance Comparison
FoM PA  Pout  G  PAE  f 2
[ITRS]
PA Technology
f
G
Psat
P1dB, out
PAE
Area
Topology
FoM
200/290 GHz fT/fMAX
SiGe HBT [1]
60GHz
10.8d
B
16dBm
11.2dBm
4.3%
2.1x0.8mm2
2-stage CE (D)
74.3
200/290 GHz fT/fMAX
SiGe HBT [2]
77GHz
17dB
17.5dBm
14.5dBm
12.8
%
1.35x0.45mm2
4-stage CE (S)
2125
200/290 GHz fT/fMAX
SiGe HBT [3]
77GHz
6.1dB
12.5dBm
11.6dBm
3.5%
2.1x0.75mm2
2-stage CE (D)
9.1
65 GHz fMAX 0.18µm
CMOS [4]
24GHz
7dB
14.5dBm
-
14.5
%
0.7x1.8mm2
2-stage cascode
(S)
11.7
84 GHz fMAX 0.18µm
CMOS [5a]
27GHz
17dB
14dBm
-
8.2%
1.2x1.7mm2
3-stage cascode
(S)
74.7
84 GHz fMAX 0.18µm
CMOS [5b]
40GHz
7dB
10.4dBm
-
2.9%
1.2x1.7mm2
3-stage cascode
(S)
2.6
170 GHz fMAX 90nm
CMOS [6]
60GHz
5.2dB
9.3dBm
6.4dBm
7.4%
0.35x0.43mm2
3-stage CS (S)
7.5
*FoM calculated using Psat and max. PAE.
(D) – Differential, (S) – Single-Ended
[1] B. Floyd et al., ISSCC ’04.
[2] A. Komijani et al., CICC ’05.
[3] U. Pfeiffer et al., RFIC ’04.
[4] A. Komijani et al., CICC ’04.
[5] H. Shigematsu et al., MTT ’05.
[6] This work.
• Highest frequency PA in CMOS
• Lowest area consumption
• Comparable to [3, 5b] in gain
and Psat
60-GHz PA and LNA in 90-nm RF-CMOS
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Conclusions
• First 60-GHz LNA and PA in 90nm RF-CMOS
• Scaling from 130nm to 90nm  better performance:
 Lower noise (comparable to best SiGe HBT LNAs)
 Lower power dissipation
 Higher gain (in LNAs)
 Reasonable output power and gain for PA
• Inductors and Xfmrs  compact layout (low cost)
• 6-GHz topologies and design methodologies can be
extended to mm-waves and ported between CMOS
foundries without redesign
60-GHz PA and LNA in 90-nm RF-CMOS
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Acknowledgments
• Gennum Corporation, NSERC and Micronet for
funding
• OIF and CFI for equipment grants
• TSMC for chip fabrication
• CMC for CAD tools
60-GHz PA and LNA in 90-nm RF-CMOS
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Thank You.
Questions…
60-GHz PA and LNA in 90-nm RF-CMOS
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60-GHz LNA Measurements
•
LNA OP1dB at 58GHz = -0.5dB
60-GHz PA and LNA in 90-nm RF-CMOS
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State-of-the-Art
mm-wave LNAs and PAs in Silicon
Block/
System
LNA
PA
Frequency
(GHz)
Technology
Reference
52, 65
SiGe (fT/fMAX=150/160GHz)
M. Gordon et al. (ESSCIRC 2004, SiRF 2006)
61.5
SiGe (fT/fMAX=200/290GHz)
B. Floyd et al. (ISSCC, 2004)
60
0.13µm CMOS
C. Doan et al. (ISSCC, 2004)
77
SiGe (fT/fMAX=220/250GHz)
B. Dehlink et al. (CSICS, 2005)
60
SiGe (fT/fMAX=200/290GHz)
B. Floyd et al. (ISSCC, 2004)
77
SiGe (fT/fMAX=200/290GHz)
A. Komijani et al. (CICC, 2005)
77
SiGe (fT/fMAX=200/290GHz)
U. Pfeiffer et al. (RFIC, 2004)
24
0.18µm CMOS
A. Komijani et al. (CICC, 2004)
27
0.18µm CMOS
H. Shigematsu et al. (MTT, 2005)
40
0.18µm CMOS
H. Shigematsu et al. (MTT, 2005)
•
Potential of mainstream CMOS for mm-wave LNAs shown in C. Doan et al. (ISSCC,
2004)
•
Benefits of scaling on mm-wave LNA performance?
•
SiGe has a clear advantage over CMOS in PA implementations due to higher
breakdown voltage  larger output power
•
No CMOS PAs > 40GHz
60-GHz PA and LNA in 90-nm RF-CMOS
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