IDT QUALITY SYSTEM OVERVIEW James Shih Vice President, Corporate Quality and Reliability Research and Development IDT© IDT CONFIDENTIAL Accelerated Thinking SM Corporate Overview FOUNDED WORKFORCE HEADQUARTERS 3,100 San Jose, California WAFER FABRICATION Hillsboro, Oregon ASSEMBLY /

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Transcript IDT QUALITY SYSTEM OVERVIEW James Shih Vice President, Corporate Quality and Reliability Research and Development IDT© IDT CONFIDENTIAL Accelerated Thinking SM Corporate Overview FOUNDED WORKFORCE HEADQUARTERS 3,100 San Jose, California WAFER FABRICATION Hillsboro, Oregon ASSEMBLY /

IDT QUALITY SYSTEM OVERVIEW
James Shih
Vice President,
Corporate Quality and Reliability
Research and Development
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Corporate Overview
FOUNDED
WORKFORCE
HEADQUARTERS
2
1980
3,100
San Jose, California
WAFER FABRICATION
Hillsboro, Oregon
ASSEMBLY / TEST
Penang, Malaysia
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A Global Force in Semiconductor Solutions
3100 EMPLOYEES
Ottawa
Hillsboro
San Jose
Headquarters
Italy
Atlanta
Shanghai
Penang
Singapore
Design Engineering Center
Sales & Marketing Headquarters
Wafer Fabrication Facility
Assembly / Test
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Sydney
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Revenue Mix by Geography
2002
2003
2004
$379.8 Million
$343.9 Million
$346.0 Million
18%
37%
48%
14%
20%
4
30%
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14%
33%
20%
19%
Americas
Japan
Europe
APAC
31%
16%
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Quality Organization
JAMES SHIH
Vice President
Quality
MARY VESEY
Director
SRAM / FCM /
IPC
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BIMLA PAUL
QA Manager
SSD / TSD /
Telecom
PS TOW
Director
Corporate QA
& Reliability
Assembly &
Backend
MIKE LAZUR
QA Manager
Hillsboro
Wafer Fab
PETER SONG
QA Manager
Penang
Operation
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Quality Certification Milestone
ISO 9001 / 9002
– Salinas,
Santa Clara,
Penang
1993
1994
STACK
0001
ISO 9001 –
Oregon
ISO 9002 –
Manila
1997
1998
ISO 14000 –
All Facilities
Certified
1999 /
2000
STACK
Self-Audit
Certification
2000 /
2004
STACK
Supplier
Award
ISO 9000 Corp.
– All Facilities
Certified
2000
TS16949
Compliance
2001
2005
ISO 9000,
Rev2000
Transitional QML
Certification
(MIL PRF 38535)
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Quality Membership in Industry
Associations and Councils
EIA / JEDEC – Electronic Industries
Association Joint Electronic Device
Engineering Council
14.1 Reliability Test Methods for
Packaged Devices
14.2 Wafer Level Reliability
14.3 Silicon Devices Reliability
Qualification and Monitoring
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IDT Compliance to JEDEC or Industry
Spec Cross Reference
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IDT TEST METHOD / PROCEDURE
JEDEC OR INDUSTRY SPEC
• Auto Clave (aka SPP)
EIA / JESD22-A102
• Bake and Ball Shear Test
• Coplanarity for PSMC
EIA / JESD22-B116
JESD22-B108
• Corrective Action Requirements
• Die Shear Test
EIA / JESD671
Mil-Std 883 Method 2019
• Dry Package Procedure
• ESD-CDM
IPC / JEDEC J-STD-033,EIA/JEP 124
JESD22-C101
• ESD-HBM
• ESD-MM
Mil-Std 883 Method 3015.7
EIA / JESD22-A115
• ESDS Handling and Control Program
• External Visual Inspection
JESD625, EIA-471
JESD22-B1081
• Failure Mechanisms and Models
• Failure Mode and Effect Analysis
JEP122
JEP131
• Failure-Mechanism-Driven Reliability Monitor
JESD659
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Quality Systems
Supplier Quality Management
• Supplier Audit, Supplier Rating
• SCIP Teams: Supplier Continuous
Improvement Process
– Silicon
– Chemical
– Gases
– Photomask
– Assembly Raw Materials
– Assembly Subconcontractor
– Burn-in Boards
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Quality Systems
IQC – Incoming Quality Control
and Supplier Certification
Fab Material
• Silicon, Gases, Chemicals, Reticles,
Targets…
Assembly Material
• Lead Frames, Mold Compounds
• Die Attach, Wires, BGA Substrates
Backend Material
• Burn-in Boards
• Test & Measurement Equipment
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Quality Systems
• Calibration Support – Recall
and Services
• Material Review Board –
Product / Process
• Non-Conforming Disposition
• Corrective Action
– Quality Alerts
– Internal Corrective Action
– Customer Complaints
– Quality Improvement Teams
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Quality Systems
Internal Audit Program
Responsibilities
• Ensure compliancy of IDT systems to
ISO-9000, ISO-14000, Military, STACK
and other customer specifications
• Detect minor, but recurring problems
that need attention
• Monitor compliancy to all IDT Quality
Systems
• Ensure that corrective actions are
implemented in a timely and effective
manner
• Provide IDT management with audit
results, trends and recommendations
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Quality Systems
Internal Audit Program
Audit System Flow
• A thorough annual internal audit is
performed at every manufacturing
facility based on the 20 ISO qualitysystems guidelines
• Re-audit of every discrepancy is
conducted to assure that the agreed
corrective actions has been
implemented
• Six-month follow-up is conducted of
every discrepancy to assure that the
agreed corrective action has remained
in place and is effective
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Quality Systems
Document Control –
Corporate Standardization
• Process / Product / Procedure
Documentation
– Manufacturing controls
– Flows, materials, procedures
– General operating procedures
– Design, quality, purchasing, training, marketing
• DCN – Document Change Control
Management
– Facilitate specification changes world-wide
– Electronic signoff from all facilities
• Electronic Spec Distribution on Intranet
– DC Web-Site locally - Offshore through DC
Department
– Paperless Specifications in Wafer Fab IV and
Santa Clara / Salinas
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Quality Systems
Product Change Notice and
Product Discontinuance Notice
• 90 Day Customer Notification of Change –
JESD 46 Compliance
– Changes that affect Form, FIT, Function
– All customers with 2 years ship history + current
backlog
– PCN will be issued with sample and qualification
data ready
• Product Discontinuance Notice – JESD 48
Compliance Notification
– 1 year minimum notification for last time buy + 3
months shipment from date of last time buy
• Electronic Notification
– IDT web page (www.IDT.com)
– Email notification
– PCN / PDN link to datasheet
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Quality Systems
RMA – Customer Return
Material Authorization
• Closed-Loop RMA Flow
– Customer complaint
– Failure analysis (5/10 working day response time)
– Corrective / preventative action (across affected
manufacturing / process areas)
– Customer feedback
– Continuous monitoring
• Management review of trends & corrective
action
– Trends
– Defect Pareto
• Critical return material requests
– Fast turnaround on F/A and containment
– Authorization # not required for critical or
fast response
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Quality Systems
Statistical Process Control (SPC)
• Responsibilities
– Each process engineering area is responsible
for developing and tracking SPC
– Formal SPC reports are generated monthly and
discussed at production meetings. Informal
reports are generated as needed
– Corporate Statistician (QA department) provides
overall coordination and guidance
– Production operator is responsible for
implementing and dispositioning “out of control”
situations
• SPC training
– Introductory SPC for all operators
– Engineering level SPC
– Engineering level statistics and design of
experiments
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Quality Systems
Qualification
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WAFER PROCESS
• Technology
• Process
• Equipment
• Material
PRODUCT
• Die revision
• Major layer change
• Fab site change
ASSEMBLY / PACKAGE
• Package technology
• Assembly site
• Equipment
• Material
BACKEND
• Packing method
• Packing material
• Subcontractor test
and burn-In
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Quality Systems
Product Qualification Guidelines and Process Design Changes
Stress Test
Photo /
Etch
Diffusion Implantation
Metallization
PolySilicon
Gate
Dielectric
Interlayer
Dielectric
Topside
Glassivation
New
Fab Site
Process
Process
Technology Transfer
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PR OCESS MODULE
X
X
X
X
X
X
X
X
X
X
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
PEVAL
WAFER SORT YIELD
SEM
AUGER ANALYSIS
BALL SHEAR
BOND PULL
BIY
BIM
LIFE TEST DYNAMIC
LIFE TEST STATIC
HAST
TC
Latch-up
ESD / HBM
ESD / MM
ESD / CDM
Other Test
SIMS
EM
HC
TDDB
QBD
Soft Error Rate (ASER)
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
(1)
(4)
X
(1)
(4)
X
X
X
X
X
(1)
(4)
X
X
X
X
X
X
X
X
X
(1)
X
(6)
X
X
X
X
X
X
X
X
(2)
(6)
(6)
X
X
X
X
X
(2)
X
X
X
X
X
X
X
(7)
X
(1)
X
1.
2.
3.
4.
5.
X
(1)
(4)
X
X
(4)
X
X
(4)
X
X
X
X
X
X
X
(1)
X
X
X
X
X
X
X
X
X
X
(3)
X
(3)
X
X
(3)
X
X
(3)
X
X
(3)
X
X
(3)
X
X
X
X
X
X
X
For components built in hermetic packages
Optional
Design Rule change
For Full Qualification, make sure that short term FIT goal is achieved, per QCC - 0025
X-ray adiology per Mil-Std-883, Method 2012, if bond pads relocated
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X
X
(3, 7)
X
X
(3, 7)
Fab Site
Product
Transfer
Wafer
Source
(Supplier)
X
X
X
X
X
(6)
(6)
X
X
X
X
X
X
X
X
Wafer
Dimension
X
(2)
X
X
X
X
X
X
(3)
X
X
X
(3)
X
X
X
X
6. For Full Qualification: 1st lot must reach 1K hours dynamic lifetest; 2nd lot must reach 1K hours dynamic lifetest
Long term and short term FIT goals must be met, per QCC-0025
For Limited Qualification:1st lot is shippable after 500 hours of lifetest
2nd lot is shippable after 500 hours of life test
3rd lot is shippable after 500 hours of lifetest and achievement of short term FIT goal per QCC-0025
7. Require only for die containing a significant amount of SRAM or DRAM
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Quality Systems
Failure Analysis Process /
Capability
• Wafer fabrication and assembly
production yield improvement
• Quality and reliability monitors
• Die & process qualification
• Package qualification
• Customer return
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Quality Systems
Failure Analysis Process Flow
Quality Receives Units
and Issues FA #
Electrical Return
Yes
Product Engineering Analyzes
the FA and Issues the Report
Coordinate
FA Activity
with Analyst
No
No
Corp F/A and
Manufacturing F/A
Groups Analyze
the F/A and
Issue the Report
FA Report Accepted
by Product QA?
Issue Final FA Report
(Corrective Action If Required)
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Quality Systems
Defect Analysis Reporting /
Continuous Improvement Plan
• Defect Pareto analysis and feedback
/ continuous improvement
• Systematic review of defects by
engineering / QA
• Management review of defect Pareto
• Continuous yield enhancement /
reliability improvement
• Corrective action (if required)
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IDT Quality System
Continuous Improvements
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Manila – V/M RMA Profile
# of RMA Events
9
+ 9 Invalid
8
7
Damaged
MBB PA56
Damaged
MBB PJ28
6
5
4
Rough Plate
DF80
Expose
Phosphorous Copper
PB32
PC20
Solderability
PA56
Non Wetting
PB44
Pkg Contam
PB32
MBB Torn
PV48
Solderability
PC20
Burrs
PB32
Solderability
DF80
Solderability
DF80
Solderability
DF80
Solder
Bridging
PC20
Metal
Shaving
PV56
Solder
Bridge
PB32
Bent Leads
PV48
Solder
Flakes
PB32
1 Unit
Missing in
Reel PC24l
Bent Leads
DF80
Lifted Leads
DM80
Bent Leads
PV48
Bent Leads
DF80
Uniquest HK
Solderability
DF80
Bent Leads
DM40
Lifted Leads
DF80
Q1'03
Q2'03
Q4'03
Q1'04
Q2'04
Q3'04
Solderability
PV56
3
2
1
0
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Q3'03
Wrong Top
Mark PC16
Damaged
Carrier
Tape PV48
Broken
Carrier
Tape PJ28
Q4'04
Solderability
PA48
Q1'05
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Penang – V/M RMA Profile
# of RMA Events
11
10
9
8
7
6
5
4
3
2
1
0
Package Chip
PL52
Oki Electric
Crushed Solder
Ball
BF208 Fujitsu
Package Swell
PH44
Hitachi - Jyotsu
Solderability
PH44 Nihon Tektronix
Solderability
PF48
Sunrise Telcom
Crack in
Shoulder PL84
Nihon Shingou
Bent Lead
DH208
3 COM
Wrong T&R
Orientation
BF64 Samsung
Misoriented
Mark PZ28
WPI – Askey
Missing / Damaged
Solder Balls
BS304 Celestica
Demarking
Contrast
PH44 Memec
Non Wetting
PK100
Celestica
Solder Ball
Damage BS304
Jabil Circuit
Foreign Material
on Lead PL68
Cytech-ZTE
Part Not Sticking
on PCB
PS24 V-Tech
Missing Solder
Ball BG119
Axiowave Networks
Bent Lead
PK100
Solectron - Cisco
Wrong Tray
PK100
Memec Japan
Tarnish Leads
CS48
General Dynamics
Bent Lead
PK128
Microtek
Lead Oxidation
PF48
Sunrise Telecom
Bent Lead
PD48
Cytech - Huawei
Device Not Bonded
on PCB PS20
Schneider Elec
Defect Solder
Ball BB256
Locus Networks
Wrong Device
Mixed in One Order
DP208 SHARP
Broken Lead
PH32
Glory Ltd
Missing Solder Ball
BX372 Uniquest
Han Infocomm
Missing SolderBall
BX372 Avnet
Sanmina Sun
Carrier Tape
Problem
PF56 Micron
Scratches &
Bent Lead
SB48 Avnet
Bent Lead
PK128
Arrow Electronic
Bent lead
PK100
Hitachi Jyotsu
Bent Lead
PZ28
Jabil Penang
Wrong Part
Shipped
PK100 Avnet
Wrong Part
Shipped
PK100 Arrow Elec
Q3'03
25
“E” Dimension
Failure PL84
Hitachi
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Q4'03
Q1'04
Q2'04
Q3'04
Mold Flash on
Gold Gate BB416
EDOM / Acard
Q4'04
Q1'05
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0.13um Product X Yield Distribution History
% Wafers
40%
Q4CY2003 Starts
35%
Q1CY2004 Starts
30%
Q2CY2004 Starts
25%
Q3CY2004 Starts
20%
Q4CY2004 Starts
15%
10%
5%
300
290
280
270
260
250
240
230
220
210
200
190
180
170
160
150
140
130
120
110
100
0%
DPW Yield
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Customer Recognition
“This is an email I never thought I would get to write after what I have
been through with other memory vendors. I would like to congratulate
you for a part that is close to god-like as a part can get. We did a
preliminary FIT rate calculation on the 4M part, and even though it is
based loosely on RMA data, it came in at a 1 FIT rate. 1 board failure
in 224,400 parts shipped. We should be increasing cut over to other
products soon, if you have not heard…”
KIRK KERCHELICH
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THANKYOU
QandA
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