Transcript Virtex-4 Overview

Virtex-4 Overview
Version 2.1
March 2005
Xilinx Advanced Products Division
4th Generation Virtex
Built on a Solid Foundation of Success
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Most Advanced Process Technology
• Advanced 90-nm process
• 11-layer copper metallization
• New Triple-Oxide technology
– Enables lower quiescent power
consumption
• Exclusive benefits:
–
–
–
–
Best cost
Greatest performance
Lowest power
Highest density
Enables 2x performance, 2x capacity, ½ power, ½ cost
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The Most Advanced Parallel I/O
Interfacing Capability
• Universal connectivity
– Support for 26 electrical standards
– ChipSync™ technology
– XCITE DCI
• Extreme performance
– Up to 1 Gbps LVDS
– Up to 600 Mbps single-ended
• Widest set of supported standards
– PCI, PCI-X, SFI-4, HSTL, SSTL,
LVCMOS, LVTTL…
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Breakthrough ChipSync™
Technology
• Pre-Engineered source
synchronous logic
• Key advantages
– Easier design
– Higher performance
– Resource savings
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SPI 4.2
DDR
Memory
• Frequency division
• Serialize/Deserialize
Pre-Designed Built-In SSIO Logic
– Embedded in All I/O
Pre-Designed Built-In SSIO Logic
IO SERDES
Precision Delay
• Bit/Word Align, DPA
IO Clocking
• I/O clocks
• Regional clocks
• Clock-capable I/Os
XCITE Digitally Controlled
Impedance
• 3rd generation DCI
– Series, parallel, differential
termination
– Temperature / voltage
compensation
• Fewer resistors on-board
• Easier PCB design
• Termination at
source or load
• Works in conjunction with I/O
standards
– Examples: HSTL, SSTL, etc
.
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Many
Selectable
Options
The Most Advanced Serial I/O
• Virtex-4 RocketIO™ transceivers
– Full-duplex serial transceiver blocks
with integrated SERDES and Clock
and Data Recovery (CDR)
• 622 Mbps to >10 Gbps operation
– Widest Range of Operation
• Compatible with Virtex-II Pro
• Supports chip-to-chip, backplane,
chip-to-optics
SONET
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SerialSerial
I/O Challenges
Virtex-4
I/O Solution
1GFC
2GFC
1.06
Storage
2.12
SATA
8.5
4.25
SATA2
GbE
10.519
6.0
CEI (OIF)
XAUI
1.25
10GFC
SATA3
3.0
1.5
Networking
8GFC
4GFC
3.125
6.25
CEI (OIF)
11G
10GbE
10.313
OC-48
Telecom
OC-12
2.488
OBSAI
0.768-1.5 CPRI
0.622 - 2.5
0.622
GbE
1.25
Computing
SATA
SATA2
3.0
HD-SDI
Video
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2.5
1.5
Rate (Gb/s)
PCIE Gen2
PCIE
Support
1.45
0.622
8
1.0
2.0
3.0
5.0
6.0
10.0
11.0
Smart RAM Memory Hierarchy
Required Memory Capacity
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Fast and Flexible BRAM
• Enhanced architecture for higher
performance
– 500 MHz performance
• Optional programmable FIFO logic
– Saves logic resources
– 500 MHz FIFO performance
• Tunable Block Structure
– Scalable and efficient
memory utilization
– Design compatible with Virtex-II Pro
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World-Class Clocking
• High-performance
– Up to 500 MHz system clock
– Up to 700 MHz source
synchronous clock
• Powerful DCM clocking
– Zero-delay buffer
– Phase-shift control
– Frequency synthesis
• More resources
– Up to 20 DCMs
– 32 global clocks
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Virtex-4 Clock Management:
Powerful Solutions
• Simplified system design
– Abundant resources
– Application-targeted features
– Comprehensive software support
• Increased system performance
– Lower jitter and duty cycle distortion
– 500 MHz clock generation and control
Clocking features, performance, and flexibility
unmatched by any other FPGA
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Next Generation
• Optional accumulator / adder
– Multiply add, multiply accumulate, or
complex multiply
• Optional pipeline registers
– 2x-10x the performance of
alternative solutions
• Cascadable
– Combine DSP Slices at Full Speed
• Highest DSP performance
– Up to 500MHz True 18-bit x 18bit
MACC Performance
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Next Generation
PCOUT
BCOUT
A:B
36
48
BREG
B
0
18
CEB
1
CE
D
Q
2-Deep
Subtract
18
CEM
MREG
CE
D
RSTB
Q
AREG
CEA
A
CE
D
Q
2-Deep
72 36 0
36
18
0
CEP
X
PREG
CE
D
Y
Q
48
0
RSTM
1
0
17-bit shift
RSTA
48
17-bit shift
RSTP
Z
CarryIn
48
C
7
OpMode
48
48
PCIN
BCIN
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P
Achieve DSP Efficiency in
Virtex-4
• Virtex-4 XtremeDSP
– Performance
• 512 XtremeDSP slices at 500MHz
• 256 GMACCs/s DSP bandwidth
– Power efficiency
• 5.7mW/100MHz scalable power efficiency
• 1/7 the power of previous FPGA solutions
– Flexibility
• Operate the XtremeDSP slice in over 40 different modes
– Efficiency
• Highest DSP bandwidth per dollar solution available
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Integrated PowerPC 405
World’s Most Popular Embedded Processor Architecture
• High-performance
– 680 DMIPS@ 450MHz
• Low power
– 0.29mW/MHz
• 2nd generation FPGA with PowerPC 405
– Preserves HW and SW IP
– CoreConnect™ bus architecture
– Full array of system-level IP
• New APU interface
– Provides direct access from FPGA fabric to
PowerPC core
– Easy microcontroller and coprocessor support
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Complete Processor Support Environment
GNU
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New Tri-Mode Ethernet MAC
Statistics Interface
• Fully integrated Ethernet Media
Access Controller (EMAC)
– 10/100/1000 Mbps
– 2 or 4 cores per Virtex-4 FX device
• UNH-Compliant
• Use with PowerPC or stand-alone
• Key benefits
– Saves up to 4000 logic cells
per Ethernet MAC
– Implement single-chip
1000 Base-X Ethernet
– Great for network management
or remote FPGA monitoring
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Processor
Block
Client
Interface
Phy
Interface
Client
Interface
Phy
Interface
Statistics Interface
Virtex-4 Secure Chip AES Provides
Maximum Design Security
• Bitstreams encrypted with
256-bit AES algorithm
• Cryptographic keys
automatically erased upon
malicious tampering
• Part of standard design flow
Among FPGA vendors, only Xilinx meets U.S.
Government standards for secure module design
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Three Virtex-4 Platforms
LX
FX
SX
Resource
Logic
14-200K LCs
12-140K LCs
23-55K LCs
0.9-6Mb
0.6-10Mb
2.3-5.7Mb
4-12
4-20
4-8
32-96
32-192
128-512
240-960
240-896
320-640
RocketIO
N/A
0-24 Channels
N/A
PowerPC
N/A
1 or 2 Cores
N/A
Ethernet MAC
N/A
2 or 4 Cores
N/A
Memory
DCMs
DSP Slices
SelectIO
Choose the Platform that Best Fits the Application
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Virtex-4 LX: Platform for Xtreme
Programmable Logic Design
• Highest logic capacity
ever
– Up to 200K LCs
• Widest capacity range
– 8 LX devices ranging
from 14K-200K LCs
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Virtex-4 FX: Platform for Xtreme
System Design
• Additional advanced
system functions
– >10 Gbps RocketIO
– PowerPC cores
– 10/100/1000 Ethernet
MAC cores
• Rich memory mix
– Up to nearly 10Mbits
BRAM/FIFO
• Six FX devices ranging
from 12K to 140K LCs
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Virtex-4 SX: Platform for Xtreme
Signal Processing Design
SX55
512
DSP
Slices
FX140
SX35
192
FX100
160
SX25
128
FX60
LX80
96
LX40 LX60
LX25
FX40
FX20
LX15
FX12
64
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• 256 GMAC/s: Highest DSP
performance in the industry
• Lowest DSP cost / performance ratio
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LX100
LX160 LX200
Device
Cost
Increased Functionality with
Dramatic Power Reduction
Challenges
- Static power (leakage) grows exponentially with process generations
- Dynamic power grows with frequency (P = cv2f)
Virtex-4 cuts power by 50%
• Measured 40% lower static power with
Triple-Oxide technology
Power
Consumption
50%
• 90-nm: 50% lower dynamic power –
Lower core voltage + less capacitance
• Up to 10x lower dynamic power with
integrated hard IP –
Fewer transistors per function
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Frequency
Packaging Engineered for
Signal & Power Integrity
• Improved signal integrity & power integrity
– Minimizes package & PCB inductances
– Reduces noise by 2/3
• Designed & verified with extensive
simulation
• No additional costs
– Use same number of PCB layers as previous
generations
The best approach for high pin-count 90nm FPGAs
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Vcco
GND
Vccint
Vccaux
Lowest-Cost, High-Performance
FPGA
• System BOM cost
– Integrated features allows elimination
of discrete devices and simplified
PCB design
• Packaged Device Cost
– 17 Virtex-4 devices to choose from
– Optimized feature ratios
– Increased device migration within
each package
• Die Cost
– Leading edge 90-nm technology
– 300mm wafers
*Based On Logic Cell Count
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• Unmatched Density
• Highest Performance
• Powerful Feature Set
• Best Cost Structure
Thank You !
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