Transcript Slide 1
Implementation of Variable-BlockSize Motion Estimation Algorithm
Using Systolic Array Architecture
Yen-Ting Lin
Wei-Jen Chen
Outline
Motion estimation algorithms( Full
Search Block Matching Algorithm)
Systolic array architecture for motion
estimation algorithms
Implementations
Fix-sized Full-Search BMA
N 1 N 1
Equation: MAD(m, n) x(i, j ) y (i m, j n )
i 0 j 0
MV arg min MAD(m, n )
( m,n )
Disadvantage: Redundancy VS Accuracy
Reference frame (y)
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- Use small block size:
some blocks will have
identical MV, thus reduce
the efficiency of compression
Current frame (x)
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- Use large block size:
may mispredict the movement
of some small objects
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Variable block size BMA
Split approach, usually in a quad-tree manner
Do while ( MAD > threshold )
{
split the current block into smaller blocks;
compute MAD
}
The motion vector for the previous page can be
represented as:
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Level 1
Level 2
MV
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Level 3
Systolic array mapping for 4x4
full-search BMA [Yeo and Hu]
Write down the 6 level do loop algorithm
Reformatted into a three level nested do loops
Localize the indexes of the inner loop indexes
Project the 3-dim array two times into 1-dim systolic
array
MV
Systolic array for variable
block size ME (4x4 & 8x8)
Easy to implement
Short clock period
Large number of
input pins
MV(i)
MV(i,4)
Block of current frame
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MV(i,3)
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MV(i,2)
MV(i,1)
Block of reference frame
Systolic array for variable block
size ME (4x4, 8x8 &16x16)
2-D PE
ARRAY(#4)
MV(i)
MV(i,j)
MV(i,j,k)
Implementation
MV2
MV
Control
Frame
address
Current
Frame
MAD
Reference
Frame
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U
X
DFF
MV_out
M
U
X
DFF
MAD_out
comp
X_out
Accu_out
x
Pixel
data
DFF
Abs
diff
DFF
add
add
DFF
PE Array
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U
X
0
y
DFF
Sel
Accu_in
Sel
System Schematic Diagram
PE Data Flow
Sel_out
Implementation (cont’d)
Implemented by Verilog; Verified by C/Matlab
Waveform of 4x4 fixed size
Waveform of 4x4 & 8x8 variable size