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Lecture 18: Datapath Functional Units Outline Multipliers 18: Datapath Functional Units CMOS VLSI Design 4th Ed. 2 Multiplication Example: 1100 : 1210 0101 : 510 1100 0000 1100 0000 00111100 : 6010 multiplicand multiplier partial products product M x N-bit multiplication – Produce N M-bit partial products – Sum these to produce M+N-bit product 18: Datapath Functional Units CMOS VLSI Design 4th Ed. 3 General Form Y = (yM-1, yM-2, …, y1, y0) X = (xN-1, xN-2, …, x1, x0) Multiplicand: Multiplier: N 1 N 1 M 1 M 1 P y j 2 j xi 2i xi y j 2i j i 0 j 0 j 0 i 0 Product: p11 y5 y4 y3 y2 y1 y0 x5 x4 x3 x2 x1 x0 x0y5 x0y4 x0y3 x0y2 x0y1 x0y0 x1y5 x1y4 x1y3 x1y2 x1y1 x1y0 x2y5 x2y4 x2y3 x2y2 x2y1 x2y0 x3y5 x3y4 x3y3 x3y2 x3y1 x3y0 x4y5 x4y4 x4y3 x4y2 x4y1 x4y0 x5y5 x5y4 x5y3 x5y2 x5y1 x5y0 p10 p9 p8 p7 p6 p5 18: Datapath Functional Units p4 p3 p2 multiplicand multiplier partial products p1 p0 CMOS VLSI Design 4th Ed. product 4 Dot Diagram Each dot represents a bit x0 partial products multiplier x x15 18: Datapath Functional Units CMOS VLSI Design 4th Ed. 5 Array Multiplier y3 y2 y1 y0 x0 x1 CSA Array x2 x3 CPA p7 p6 p5 p4 p3 p2 p1 p0 A B critical path Sin A Cin B Sin B Cout = Cout Cout A Sout 18: Datapath Functional Units Cin A = Cout Cin Sout B Cin Sout Sout CMOS VLSI Design 4th Ed. 6 Rectangular Array Squash array to fit rectangular floorplan y3 y2 y1 y0 x0 p0 x1 p1 x2 p2 x3 p3 p7 18: Datapath Functional Units p6 p5 p4 CMOS VLSI Design 4th Ed. 7 Fewer Partial Products Array multiplier requires N partial products If we looked at groups of r bits, we could form N/r partial products. – Faster and smaller? – Called radix-2r encoding Ex: r = 2: look at pairs of bits – Form partial products of 0, Y, 2Y, 3Y – First three are easy, but 3Y requires adder 18: Datapath Functional Units CMOS VLSI Design 4th Ed. 8 Booth Encoding Instead of 3Y, try –Y, then increment next partial product to add 4Y Similarly, for 2Y, try –2Y + 4Y in next partial product 18: Datapath Functional Units CMOS VLSI Design 4th Ed. 9 Booth Hardware Booth encoder generates control lines for each PP – Booth selectors choose PP bits 18: Datapath Functional Units CMOS VLSI Design 4th Ed. 10 Sign Extension Partial products can be negative – Require sign extension, which is cumbersome – High fanout on most significant bit s s s s s s s s s s s s s s s s s s s s s s s s s s s s s s s s s s s s s s s s s s s s s s s s s s s s s s s s s s s s s PP0 PP1 PP2 s s s 0 x-1 x0 PP3 PP4 multiplier x s s s s s s s s PP5 PP6 PP7 PP8 18: Datapath Functional Units CMOS VLSI Design 4th Ed. x15 0 x16 0 x17 11 Simplified Sign Ext. Sign bits are either all 0’s or all 1’s – Note that all 0’s is all 1’s + 1 in proper column – Use this to reduce loading on MSB s 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 s 1 1 1 1 1 1 1 1 1 1 1 1 1 s 1 1 1 1 1 1 1 1 1 1 1 s 1 1 1 1 1 1 1 1 1 s 1 1 1 1 1 1 1 s 1 1 1 1 1 s 1 1 1 s 1 s s s s s s s s PP0 PP1 PP2 PP3 PP4 PP5 PP6 PP7 PP8 18: Datapath Functional Units CMOS VLSI Design 4th Ed. 12 Even Simpler Sign Ext. No need to add all the 1’s in hardware – Precompute the answer! s s s 1 s s 1 s s 1 s s 1 s s 1 s s 1 s s s s s 18: Datapath Functional Units CMOS VLSI Design 4th Ed. PP0 PP1 PP2 PP3 PP4 PP5 PP6 PP7 PP8 13 Advanced Multiplication Signed vs. unsigned inputs Higher radix Booth encoding Array vs. tree CSA networks 18: Datapath Functional Units CMOS VLSI Design 4th Ed. 14