Transcript Document

Power
Electronics
Group
P.O. Box 35
Monash University, 3800
Victoria, AUSTRALIA
PH:
+61-3-9905 3473
+61-3-9905 3478
FAX: +61-3-9905 9606
An Integrated Approach for the
Protection of Series Injection Inverters
Michael Newman
Supervisors: Dr D.G. Holmes and Prof. R.E. Morrison
The Integrated Protection Solution
The Series Protection Problem
 Create an appropriately rated current path for all load and
fault conditions using the IGBT ‘null’ state (Fig. 3),
triacs/thyristors, and a primary bypass contactor.
 Ensure hardware trip capabilities of the triacs/thyristors
with reset capabilities held only by the DSP controller.
 Triacs / thyristors should also have trip capabilities from
the DSP, for over-current and other inverter faults.
 Co-ordinate the system startup, shutdown, fault reaction,
and fault recovery using a state machine (Fig. 4).
 Appropriately rate the protection elements based on the
fault level, power system protection parameters and
inverter ratings.
Normal Operation
3 Phase Fault Duration
Initialise
State
1500
~
1000
~
After
Initial Call
(1,4,5)
Open
Contactor
State
Contactor
Opened
(1,4,6)
Open
Triac
State
Otherwise
Wait (4)
Triac
Opened
(1,4)
3 phase
Voltage Source
0
-500
-1000
-1500
0
0.01
0.02
0.03
Time (sec)
0.04
0.05
3 phase Current
Transformer (CT)
0.06
3 phase
Voltage Source
System Load
System Load
3 phase Current
Transformer (CT)
to Active or Passive
3 phase Rectifier
OFF
Isolated
State
Contactor
Closed
(3)
2000
Wait for Un-Isolated
Button & No Fault
0
ON
OFF
OFF
0.02
Close
Contactor
State
Fault held too long or
Thermal Fault (2,3)
Wait Until Contactor is
Closed (3-4 Cycles) (2,3)
ON
Fault
State
Ramp
Down
State
Wait for Cleared &
Acknowledged Fault (2,3)
(1) Forced IGBT Null State (All Lower IGBTs ON)
(2) All IGBTs Forced OFF after Delay for Triac Latching
-4000
0.01
Update
Reference
from
Background
Otherwise Decrement
Reference Magnitude
(4)
DC Bus Voltage
Vab Inverter Output Voltage
0
Run
State
(4)
OFF
4000
-2000
Otherwise Increment
Reference Magnitude
(4)
to Active or Passive
3 phase Rectifier
OFF
OFF
Stop
State
Fault (1,3,5)
500
Ramp
Up
State
OFF Switch (4)
Wait Until Triac
is Open (1,4)
Wait Until Contactor
is Open (1,4,5)
ON Switch (4)
 The action of the series connection is closer to a current
transformer than a voltage transformer, (from the inverters
perspective) whilst the mmf balance is preserved.
 Fault currents will reflect through to the inverter.
 If the inverter is tripped off under fault conditions (or even
under normal load conditions) the current transfer will still
remain, causing the inverter to perform as a rectifier (Fig. 2).
 Substantial overvoltages are quickly generated, destroying the
inverter (Fig. 1).
 A constant current path is required at all times, irrespective of
the load current and state of the inverter, to avoid damage to the
series inverter system.
0.03
Time (sec)
0.04
0.05
0.06
Figure 1
Figure 3
Figure 2
(3) Power Drive Protection Masked Out
(4) Power Drive Protection Unmasked
(5) Triac Held Latched ON by DSP
(6) Triac Latch Reset by DSP
Figure 4
~
Series
Inverter
Shunt
Inverter
Fault
Condition
Protection
Power
Elements
Simulated Results
Experimental Setup
Experimental Fault Tests
Triac Triggered by Overcurrent and held by latch
Normal Operation
3 Phase Fault Duration
200
Triac Triggered by Overcurrent
Normal Operation
3 Phase Fault Duration
NULL
100
Ramp Up to Normal
Operation
300
200
100
0
-100
3 Phase Variac
0
V1
(190Vrms L-L)
-100
~
Resistive Load Bank
IL
-200
-300
Pulse
0.02
0.04
0.06
0.08
0.1
Time (sec)
0.12
0.14
0.16
0.18
100
50
0
-50
-100
-150
0.08
0.1
Time (sec)
Lf
5mH
0.12
0.14
0.16
0.18
3 Phase Variac
CDC
0.2
2350uF
25
Triacs
15
MOVs
5
-5
RTRIAC
Cf
7.5uF
20A Overcurrent Trip Levels
-25
0.02
0.04
0.06
300
200
100
0
-100
-200
-300
0.08
0.1
Time (sec)
0.12
0.14
0.16
0.18
0.2
Triac
Driver
DC Bus Voltage
Dual Control
Latch Unit
Vab Inverter Output Voltage
0.02
Run State
0.04
0.06
0.08
0.1
Time (sec)
Fault State
0.04
0.06
0
0.02
0.04
0.06
0.12
0.14
0.16
0.18
0.2
0.08
0.1
Time (sec)
0.12
0.14
0.16
0.18
0.2
~
0.08
0.1
Time (sec)
0.12
0.14
0.16
0.18
0.2
0.12
0.14
0.18
0.2
150
100
50
0
-50
-100
-150
5
Varistor
Currents
Interface
0
0.02
0.1
Time (sec)
10
-15
0
0
0.08
-40
I2
0.06
0.06
-20
VDC (270V)
V2
0.04
0.04
0
1:6 Ratio, 3 phase,
Current Transformer
with Delta Winding
0.02
0.02
20
3 Phase Short Circuit
0.2
150
0
0
40
Isolation Breaker
0
-200
0.12
0.14
Open Triac
State
0.16
Ramp Up
State
0.18
IGBT Isolated
Gate Signals
0
9A Overcurrent Trip Levels
-5
Inverter
Current Signals
Bi-directional Interface
Breaker Control and Sense Signals
VDC
DSP Controller
TI TMS320F240
-10
0
0.02
0.04
0.06
0.08
D-Sat Fault Signal
Thermal Protection Signal
0.2
Run State
0.16
300
200
100
DC Bus Voltage
0
-100
-200
-300
Vab Inverter Output Voltage
0
Electrical and Computer Systems Engineering
Postgraduate Student Research Forum 2001
0.1
Time (sec)
0.02
0.04
0.06
0.08
0.1
Time (sec)
0.12
0.14
0.16
0.18
0.2