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HW/SW co-simulation within the MODUS toolset
MODUS Project FP7- 286583
Methodology and Supporting Toolset Advancing Embedded Systems Quality
Eclipse Conference
Toulouse, May 6th 2013
MODUS Project FP7- SME – 2011- 286583, Eclipse Conference Toulouse, May 6th 2013
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M3Systems: Leading SME in radionavigation
An independant SME founded in 1999, performing research and
engineering in radio navigation and applications
Activities include but not restrained to:
Radio navigation technical studies
Airport applications
Critical transportations
…
Implied in several national and
European projects.
MODUS Project FP7- SME – 2011- 286583, Eclipse Conference Toulouse, May 6th 2013
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Summary
MODUS project and toolset
Principle and objectives
HW/SW co-simulation workflow
HW/SW co-simulation environment
HW/SW co-simulation demonstration
MODUS Project FP7- SME – 2011- 286583, Eclipse Conference Toulouse, May 6th 2013
Page 3
Summary
MODUS project and toolset
Principle and objectives
HW/SW co-simulation workflow
HW/SW co-simulation environment
HW/SW co-simulation demonstration
MODUS Project FP7- SME – 2011- 286583, Eclipse Conference Toulouse, May 6th 2013
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MODUS project and toolset
MODUS aims to help SMEs to substantially improve their positioning in
the embedded-systems development market
MODUS is a set of open and customizable methodologies including:
Model verification by guiding the selection of existing open-source model
verification engines
Interfacing with standard simulation platforms for HW/SW co-simulation
Software performance-tuning optimization through automated design
transformations
Customizable source-code generation towards respecting coding standards and
conventions
MODUS does not aim to be competitive with the vendors of CASE tools
that are presently used in embedded software engineering, but to bring the
technology to SMEs.
MODUS Project FP7- SME – 2011- 286583, Eclipse Conference Toulouse, May 6th 2013
Page 5
Summary
MODUS project and toolset
Principle and objectives
HW/SW co-simulation workflow
HW/SW co-simulation environment
HW/SW co-simulation demonstration
MODUS Project FP7- SME – 2011- 286583, Eclipse Conference Toulouse, May 6th 2013
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Principle and objectives
Embedded systems design complexity is growing exponentially with
more integrated applications and feature
MODUS Project FP7- SME – 2011- 286583, Eclipse Conference Toulouse, May 6th 2013
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Principle and objectives
Y-Chart approach
Clear separation
between architecture
and application
Architecture
Application
Mapping
Changes in
architecture
System
Changes in
application
Analysis
Iterative
Rely on an efficient and fast way to perform the steps of the iteration
The actual implementation of the approach usually relies on design, simulation, and
analysis, of software models of the system i.e. Virtual Platforms
MODUS Project FP7- SME – 2011- 286583, Eclipse Conference Toulouse, May 6th 2013
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Principle and objectives
MODUS approach
Architecture
Application
High level modelling
of architecture
Model of the
architecture
Model of the
application
Generation of Virtual
Platform
Virtual
Platform
Software
binary
Mapping
Changes in
architecture
“Executable”
System
Changes in
application
Cosimulation
MODUS Project FP7- SME – 2011- 286583, Eclipse Conference Toulouse, May 6th 2013
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Summary
MODUS project and toolset
Principle and objectives
HW/SW co-simulation workflow
HW/SW co-simulation environment
HW/SW co-simulation demonstration
MODUS Project FP7- SME – 2011- 286583, Eclipse Conference Toulouse, May 6th 2013
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HW/SW co-simulation workflow
MODUS full HW/SW co-simulation workflow:
Embedded
system
Define the hardware architecture
Model the architecture using UML
Generate the SystemC virtual platform
Complete and configure the virtual platform
Generate the executable virtual platform
Integrate the SW Binaries in the platform
Co-simulate the executable system
Change the architecture if needed
Re-iterate
Changes in
architecture
Embedded
system
HW
Embedded
system
SW
Architecture
modelling
Model of the
architecture
Virtual Platform
generation
Generated
Virtual
Platform
MODUS
software
design flow
Virtual Platform completion
and configuration
Changes in
application
Virtual
Platform
Virtual Platform
compilation
Executable
Virtual
Platform
SW
Binary
Mapping
“Executable”
System
Cosimulation
MODUS Project FP7- SME – 2011- 286583, Eclipse Conference Toulouse, May 6th 2013
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HW/SW co-simulation workflow
Architecture modelling using UML Marte
Structure composite diagram with restrictions on constructs
A system is modelled as a set of components interconnected through ports to a bus.
Class stereotyped with a subset of MARTE HwLogical stereotypes and some of
their properties
HwProcessor , HwBus (latency), HwRAM (latency, size), HwIO, HwDevice, HwEndPoint
MODUS Project FP7- SME – 2011- 286583, Eclipse Conference Toulouse, May 6th 2013
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HW/SW co-simulation workflow
Virtual Platform generation
SystemC : C++ library for systems modelling, which includes a simulation kernel.
Modules, ports, channels, processes, events, specific datatypes…
Interface
Module
Module
Process
Channel
Port
Process
Port
TLM2.0 : Extension to SystemC with the purpose to abstract communications with
high level transactions. Suited for the modelling of memory-mapped bus systems.
Generic payload, sockets… supporting two coding styles : Loosely Timed and
Approximately Timed.
Target
socket
Initiator
Interconnect
Initiator
socket
Socket binding
MODUS Project FP7- SME – 2011- 286583, Eclipse Conference Toulouse, May 6th 2013
Initiator
socket
Target
Target
socket
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HW/SW co-simulation workflow
Virtual Platform generation
simple_target_socket
Processor
Memory
simple_initiator_socket
Bus
Probes
I/O Device
Generation of a Loosely-Timed virtual platform
Modules are generated as skeletons to be completed by MODUS users (except Bus and
Memories (SRAM), as well as a set of probes).
MODUS Project FP7- SME – 2011- 286583, Eclipse Conference Toulouse, May 6th 2013
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Summary
MODUS project and toolset
Principle and objectives
HW/SW co-simulation workflow
HW/SW co-simulation environment
HW/SW co-simulation demonstration
MODUS Project FP7- SME – 2011- 286583, Eclipse Conference Toulouse, May 6th 2013
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HW/SW co-simulation environment
HW/SW co-simulation environment
Graphical UML
modeller
MDT Papyrus
Generation
engine
Acceleo
UML MARTE
model
Generated
SystemC virtual
Eclipse plug-ins platform
Compilation with
external tools:
Eclipse CDT
Visual Studio
…
Completion and
configuration
Eclipse
Configured
SystemC virtual
platform
Built over the Eclipse framework as a set of specific plug-ins
MODUS Project FP7- SME – 2011- 286583, Eclipse Conference Toulouse, May 6th 2013
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Summary
MODUS project and toolset
Principle and objectives
HW/SW co-simulation workflow
HW/SW co-simulation environment
HW/SW co-simulation demonstration
MODUS Project FP7- SME – 2011- 286583, Eclipse Conference Toulouse, May 6th 2013
Page 17
Virtual platform demonstration
Completely generated modules
Memory
PLBBus
“Data Transfer”
Software
GNSS data
Acquisition
GNSS data
positioning
MODUS Project FP7- SME – 2011- 286583, Eclipse Conference Toulouse, May 6th 2013
Generated modules, but completed
and configured by the user
MicroBlaze
UART
Acquisition and tracking
Positining
“Data transfer” software compiled
using Xilinx tools and loaded into the
virtual platform memory
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Than you for your attention!
Yann Leclerc
R&D Engineer – M3 Systems
Tel: +33 5 62 23 10 84
Fax: +33 5 62 23 10 81
email: [email protected]
MODUS Project FP7- SME – 2011- 286583, Eclipse Conference Toulouse, May 6th 2013
Chafic Jaber, PhD
Research Engineer – M3 Systems
Tel: +33 5 62 23 10
Fax: +33 5 62 23 10 81
email: [email protected]
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