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ALF IEEE kickoff
meeting
February 20, 2001
Prepared by Wolfgang Roethig
[email protected]
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Contents
• Presentation to DASC
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Objective, Scope
Target Application support
Motivation
Conclusion
• Supplement
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More explanation
A brief history of ALF
ALF support in the industry - a survey
Explanation of IEEE procedure
What’s next
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Presentation to DASC
The following people prepared the slides targeted for DASC
Simon Favre
Monterey Design Systems
Greg DuFour
Mentor Graphics
Jay Abraham
Silicon Metrics
Pierre Girouard
LogicVision
Liz Chambers
Tera Systems
Cynthia Parrish
Aristo
Wolfgang Roethig NEC
Tim Ehrler
Philips
Alex Zamfirescu
Alternative System Concepts, IEEE DASC member
Nancy Nettleton
SUN Microsystems
Joe Daniels
Accellera
Antonero Carvalho LSI Logic
Vinay Srinivas
Sequence Design
Li Pen Yuan
Avant! Corporation
Arun Balakrishnan NEC
Steffen Rochel
Simplex
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Objective
• The objective of the Advanced Library Format (ALF) is to
provide a modeling language and semantics for functional,
physical and electrical performance description of
technology-specific libraries for cell-based and blockbased design.
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Scope
• ALF shall serve as the primary data specification of library
elements for design applications, from RTL to tape-out, used
to implement integrated circuits.
• The language shall model behavior, timing, power, signal
integrity, physical abstraction and physical implementation
rules of library elements.
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Target Application Support
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Motivation
• VDSM technology enables larger designs and requires
knowledge of more physical and electrical details
– more abstract models required
– models must capture pertinent electrical and physical data
– models must be efficient for design and analysis
• As design tools and flows become more complex, preparation
of technology libraries becomes more expensive
– Multiple library representations for increasing number of tools
– Tool-specific libraries change versions frequently
• Advantages of a standard library model description
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reduce the cost and increase the quality of the library
less time and resources required for creation and validation
facilitate tool interoperability
leverage 3rd party library sources
enable design tools to keep pace with evolving technology spec
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Motivation
• Design tools do not work in isolation any more
– logical design tools are aware of layout (“physical synthesis”)
– layout tools are aware of electrical constraints (timing, power,
crosstalk, voltage drop)
– Performance optimization tools must respect reliability and
manufacturability constraints (electromigration, antenna)
– DFT tools not only for functional correctness, but also electrical
correctness (delay faults, severe voltage drop)
• As a consequence, a comprehensive and coherent
modeling approach is required
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Conclusion
• We propose to use the existing ALF 2.0 specification from
Accellera as a baseline for a standard library model
description
• Therefore, we request to be recognized as IEEE study
group and to process a PAR, and we invite interested
parties to participate
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More explanation
• The ALF description is targeted to support the following
design applications: synthesis, design planning, design for
test, simulation, timing, power and signal integrity
analyses and layout.
• This description is targeted for the following design steps
in VDSM technologies:
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RTL design planning, synthesis, formal verification
design for test including BIST
place and route
analysis and optimization of electrical performance
i.e. timing, power, signal integrity
– model abstraction for hierarchical design
– physical design rule checks for manufacturability
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A brief history of ALF
• Started in 1996 by OVI as “Power and Synthesis Technical
Steering Committee”
• Draft spec published and announced by OVI at HDL conference
March 1997
• Proof of concept design flow demonstrated by ECSI in 1997
• ALF 1.0 approved by OVI board in November 1997
• 1998 collaboration started with ASIC council/SI2 on developing
an Open Library Architecture (OLA)
– leveraging ALF and DPCM procedural interface (IEEE 1481)
– Several ASIC vendors developed ALF prototype libraries
• ALF 1.1 approved by OVI board in April 1999
– Comprehensive function, timing, power characterization for ASIC cells
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A brief history of ALF
• May 1999 ASIC council recommended to develop physical
model description capabilities in ALF
– using LEF datamodel as baseline and developing enhancements
• January 2000 ALF work group merged with OPEF (Open
Physical Exchange Format) workgroup from OVI
• Emerging ALF support for library characterization and EDA
tools in 2000
– power tools in production
– timing and signal integrity tools and libraries under development
– specification development for physical design, hierarchical design, BIST
• ALF 2.0 approved by Accellera board (merged OVI/VI) in
November 2000
– supports functional, physical, electrical description of technology, cells,
blocks, cores
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ALF support in the industry - a survey
• Survey conducted amongst ALF meeting participants
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3 Silicon vendors
1 library creation tool vendor
9 EDA vendors
2 others (no data for survey)
• Survey has the following categories:
– library support (for silicon vendors and library creation tool vendors)
– tool support (for EDA vendors and silicon vendors with proprietary tools)
• How to read the results
– The numbers indicate how often the item was chosen
– choice could be split, for example 0.2 or one item 0.8 for another item to
indicate a weighted preference
– Results are only intended to give a rough idea where ALF stands today
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ALF support in the industry - a survey
• Silicon vendor library / library creation tool vendor
– library purpose
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logical design (1)
timing (2) / power (2) / signal integrity (3)
physical design (1)
other (specify): Electrical rule check (1)
– development status
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no plans, informational interest only (2)
planned (1)
under development (1)
engineering release (1)
production release (2)
– for library creation tool only
• number of target tools (1)
• number of customers (4)
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ALF support in the industry - a survey
• EDA tools
– tool class
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design planning (3)
synthesis (2)
place & route: (3) for detailed P&R, (1) for global P&R
design for timing (4) / power (3) / signal integrity (4)
other (specify): Electrical rule check (1), DFT/BIST (2)
– development status
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no plans, informational interest only (2)
planned (6.8)
under development (2.2)
engineering release (0)
production release (2)
– preferred support model
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native ASCII read (4.36)
compiled into proprietary binary (2.13)
translation into other ASCII format (1.33)
procedural I/F (OLA) - choice between ALF and other input format: (7.16)
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Explanation of IEEE procedure
• DASC (Design Automation Standards Committee) creates IEEE
groups for EDA standards (details see http://dasc.org)
• 1st step: submit a PAR (Project Authorization Request) to DASC
– next DASC meeting is Feb. 26-28 @ NEC in Santa Clara
• When DASC approves, IEEE study group is formed
– study group members must become DASC members
– membership fee ~$150 to cover administrative cost
• Study group formulates work group objectives in PAR
– 6 months duration maximum (1 day minimum)
• After DASC approval of the PAR, work group is formed
– task: develop and review specification document
– process must be open, non-discriminatory, democratic
– knowledge of work group must be available worldwide in the industry
• When spec is done, approval for ballot is needed
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What’s next
• fill out PAR for ALF
• elect chair for ALF group
• ensure good communication with other standardization
work groups on topics of common interest
• start technical work
– Laundry list for amendments
– Wish list for new features
– Note: not only can we change or add new features, we can also
remove obsolete old features
• Draft a schedule and assign owners / experts for specific
chapters of the spec
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