Transcript Reconfigurable Hardware - Vienna University of Technology

Reconfigurable Hardware
Thomas Polzer
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Overview
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Definition
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Methods
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Devices
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Applications
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Problems
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Hardware or Software?
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Definition
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Configurable Hardware
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Already seen in previous talk
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A piece of hardware which can change its
functionality according to a configuration.
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Configuration only changed by developer
Reconfigurable Hardware
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Special kind of configurable hardware
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Configuration can be changed while device is
operational
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FPGA Layout
Source: [4]
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Methods (I)
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Complete Reconfiguration
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Whole configuration updated
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Normally done by operator/developer
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Device must be reinitialized
Partial Reconfiguration
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Difference based
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Module base
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Methods (II)
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Difference Based Partial Reconfiguration
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New and old configuration compared
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Only changes are reprogrammed
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Whole column reprogrammed
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Methods (III)
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Module Based Partial Reconfiguration
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Design partitioned into modules
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Each module can be replaced in runtime
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Other modules stay operational
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Size and shape
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Whole column
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Rectangle
Special interfaces between modules
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Methods (IV)
Source: [1]
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Methods (V)
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Controller
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internal

external
Source:[2]
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Devices (I)
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Xilinx
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Spartan-3 series
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Complete reconfiguration (only A and E series)
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Difference based partial reconfiguration
Virtex series
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Complete reconfiguration
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Difference based partial reconfiguration
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Module based partial reconfiguration
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Devices (II)
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Altera
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Stratix series
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Cyclone series
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Complete reconfiguration
Complete reconfiguration
Atmel
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Field Programmable System Level Integrated
Circuits (FPSLIC)
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Complete reconfiguration
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Module based partial reconfiguration
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Devices (III)
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Lattice
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ORCA series
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Complete
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Difference based partial reconfiguration
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Module based partial reconfiguration
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Applications (I)
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Increased Fault Tolerance
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Monitoring of functional units
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In case of failure -> reconfigure empty space to
replace it
Increased Capacity
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Not all functional units deployed simultaneously
Remote Update
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Download a new configuration via serial line or
network
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Applications (II)
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Speed-Up
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Special modules loaded on demand
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Modules depending on task
Reduction of power consumption
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Not all modules active
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Inactive modules are not deployed
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No power consumption by that modules
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Problems
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Corrupted Configuration Data
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Possible solution: Fall back configuration
Security
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Unauthorized changes to hardware
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“Stealing” of the configuration
Safety
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New layer of complexity
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Harder to test
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Harder to guarantee correctness
Unwanted reconfigurations
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Hardware/Software
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Why it is Hardware
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Still a system of logic gates
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Inherent parallelism remains
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Short execution time
Why it is Software
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Has all the dynamic properties of software
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Adaption to specific problems at runtime
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Adaptive algorithms
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Partly sequential operation
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Easy to update
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End
Thank you for your attention!
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References
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1 - Xilinx Application Note 290
2 - Hiibner, Schuck, Kiihnle, Becker - New 2-dimensional partial dynamic reconfiguration techniques for
real-time adaptive microelectronic circuits - IEEE Computer Society Annual Symposium on Emerging
VLSI Technologies and Architectures, 2006
3 – AT94S40AL datasheet
4 - Sedcole, Blodget, Becker, Anderson, Lysaght - Modular dynamic reconfiguration in Virtex FPGAs IEEE Proc.-Comput. Digit. Tech., Vol. 153, No. 3, May 2006
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5 - Emmert, Stroud, Skaggs - Dynamic Fault Tolerance in FPGAs via Partial Reconfiguration
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6 - ORCA Series 3C and 3T FPGAs Data Sheet
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7 – Amir H. Sheikh Zeineddini - Secure Partial Reconfiguration of FPGAs – Master Thesis - 2005
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