Embedded Systems and Software

Ed F. Deprettere, Todor Stefanov, Hristo Nikolov {edd, stefanov, nikolov}@liacs.nl

Leiden Embedded Research Center Spring 2008; Friday 1:30 p.m. – 4:00 p.m.

http://www.liacs.nl/~cserc/EMBSYST/EMBSYST2008/ 01EMBSYST2008 Ed F.Deprettere

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The Course

• Introduction to course (today) • Models of Computation (MoC), - dataflow graphs, dataflow process networks, analysis, - scheduling, memory management, • Kahn Process Networks (also introduction to hands-on), - Another MoC, - Conversion of sequential imperative nested-loop programs to input-output equivalent process networks, • Mapping of process networks to multi-core architectures, - Workload modeling, performance analysis, exploration, - Homogeneous and heterogeneous target platforms, 01EMBSYST2008 Ed F.Deprettere

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Introduction to course

• Systems and Embedded Systems, • History of Embedded Systems and Software, • Examples, • Complexity issue, • Trends and challenges, • Design space exploration, • Programming and translating, • Conclusions.

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Examination

No formal written exam Final grade (10) consists of average of three sub-grades 1. active course participation (10) 2. power-point presentation (10) 3. hands-on (10) 01EMBSYST2008 Ed F.Deprettere

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The books

1.

Computers as Component, Principles of Embedded Computer Systems Design. Wayne Wolf . (Morgan Kaufman Publishers)

http://www.ee.edu/~wolf/embedded-book/about.html

2. Embedded System Design. Peter Marwedel. (Kluwer) http://ls12-www.cs.uni-dortmund.de/~marwedel/kluwer-es-book 3. Embedded System Design, A Unified Hardware/Software Introduction. Frank Vahid/Tony Givargis (Wiley)

http://www.ics.uci.edu/~sumitg/CadPages.html

4. Fundamentals of Embedded Software. Daniel W. Lewis (Prentice

Hall) http://www.prenhall.com/divisions/esm/app/lewis/materials.html

5. Embedded Multiprocessors: Scheduling and Synchronization.

Sundararjan Sriram and Shuvra S. Bhattacharyya (Marcel Dekker)

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Systems

A system is a composition of functionalities that jointly implement an input-output behavior in a dependable and secure manner.

Dependable system

: can deliver services that are justifiable trusted (have accepted dependences)

Secure

: composite of attributes of • confidentiality (degree of confidence) • integrity (absence of improper system alteration) • availability (readiness for correct service) Secure system behaves as intended.

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Embedded Systems

An Embedded System is an information processing system that is: •

application domain

specific (

not

general purpose) • tightly coupled to its

environment

Examples of

application domains

are: automotive, multimedia.

Environment : type and properties of input/output information.

Tightly coupled : environment

dictates response

what the system’s behavior must be.

Current Embedded Systems are becoming multi-core multi-platform (sub-)systems, executing multiple independent applications, mostly in real time , and at low power consumption.

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Embedded Systems (2)

Do Embedded Systems belong to the field of Computer Science, or to the field of Computer or even Electrical Engineering?

An embedded system performs computation that is subject to physical constraints: interaction with a physical environment, and execution on a physical (implementation) platform.

• •

interaction: deadlines, throughput, jitter execution: available resources, power, failure rates Embedded systems design is not a straightforward extension of either hardware (computer/electrical engineering) or software (computer science) design. They have functional requirements (expected services), and they have extra-functional requirements (performance/cost, robustness).

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Embedded Systems (3)

Specific: Computer Science provides (software) functionality for Instruction Set Architectures (ISA) which are characterized by an instruction set and an organization (program counter, register file), independent of any logical implementation and physical

realization.

Computer/Electrical Engineering deals with logical implementation and physical realization.

An Embedded Systems design discipline needs to combine these two approaches, because extra-functional behavior (such as timing) is a crucial issue, especially when there are real-time constraints imposed by the environment, and when to predict extra-functional behavior using abstract models that cannot be well specified if the relation between functional behavior and extra-functional behavior is obscure.

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History

In the past, embedded systems were called (embedded) controllers (micro-controllers). They appear typically in

control dominated applications.

Examples: traffic lights, elevators, washers, dryers, vendor machines ATM machines These are relatively simple finite state machines implemented using either micro-controllers or sequential circuits (programmable logic arrays – PLA) inputs outputs

PLA

current state next state

registers 01EMBSYST2008 Ed F.Deprettere

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Some small examples

Product: Hunter Programmable Digital Thermostat.

Microprocessor: 4-bit

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Product: Miele dishwashers.

Microprocessor: 8-bit Motorola 68HC05.

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Product: NASA's Mars Sojourner Rover.

Microprocessor: 8-bit Intel 80C85.

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Product: Sony Aibo ERS-110 Robotic Dog.

Microprocessor: 64-bit MIPS RISC.

What they have in common: They

sense

the environment (input signals),

decide on

(compute)

their actions

(responses) in

real time.

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History (cont’d)

With growing complexity of applications some

processing of signals

was added to pure

finite state machine behavior

: FSMs became EFSMs (

extended finite state machines).

With still more growing complexity

concurrency

and

parallelism

become important. E.g., communicating (E)FSMs. Here is what is happening.

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Complexity Issue

Embedding systems – hence embedded systems – may be (extremely) complex.

• wafer steppers Expected • imaging (medical, biology, astronomy) • digital copiers/printers Shared memory architecture Actual time 01EMBSYST2008 Ed F.Deprettere

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Complexity Issue (cont’d)

Embedding systems – hence embedded systems – may be (extremely) complex.

Expected • wafer stepper • imaging (medical, radar, telescope) Application complexity (Shannon Law

)

Shared memory architecture Actual time 01EMBSYST2008 Ed F.Deprettere

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μP will do for small systems

For many consumer products, a single μProcessor will do.

For other systems – such as a car – a network of μProcessors is needed.

For even larger systems – heterogeneous multi-processor Embedded Systems are needed 01EMBSYST2008 Ed F.Deprettere

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Heterogeneous Architectures

Programmable core + SW

TM MIPS Mem CP1 CP2

Dedicated coprocessor

Heterogeneous architectures consist of programmable and dedicated components

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Trend in Multi-processor

• current state of art: co-processor • next: multi-processor • then: heterogeneous multi-processor Mem Mem Mem ...

Mem  P

FPGA

Communication Structure  P  P  P  P ...

• later: networks on chips 01EMBSYST2008 Ed F.Deprettere

Identical tiles (scalable) 20

Small Systems: CoMPSoC

A relatively small Embedded System is • a

multi-processor infrastructure

• having a (MP) service providing organized as a • in which processors are configurable, dedicated)

system-on-chip heterogeneous resource

(programmable,

communication, synchronization,

infrastructure that is built on top of a • being capable of executing a

composition

(independent) applications simultaneously.

and (SoC),

storage Network-on-Chip

(NoC) (Co) of multiple Processors run autonomously and concurrently, and are not abundant as in (homogeneous) cluster or grid computers. 01EMBSYST2008 Ed F.Deprettere

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A less simple Embedded System

station density high in core

• LOFAR • SKA Central core (2km) Distributed hierarchical radio telescopes Remote stationation text • •

station contains 100 LF antennas 100 HF compound antennas central core contains supercomputer 350 km

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Embedded Systems (5)

In this course we envision an embedded system (model) to be the triple < application (model), architecture (model), association of the two together> The

application (model)

is a pure

functional

model: it has no timing properties.

The

architecture (model)

is a pure

extra-functional

model: it has no functional behavior.

The

association together

(mapping) relates application (model) and architecture (model).

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Application Model Application

: processes and inter-process communication channels

D A C data-stream data-stream B communication channel D process while(1){ read (A); read write (B); execute (); (C); service co-ordination (synchronization) is well defined }

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functionality

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Architecture Model Architecture

: composition of (library) components

buffers service timing, cost private memory processor types network shared memory

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Mapping

D A C B

Mapping:

relation

{D, A}

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Design Space Exploration

Application Mapping Architecture Analysis (Semi-) Automated Design Space Exploration

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Challenges

Given that an embedded system architecture consists of a number of heterogeneous computational units (programmable, configurable, and dedicated), and a communication, synchronization and storage infrastructure:

•

How to map sequential C or C++ programs to such parallel architectures?

•

How to map several applications simultaneously to such architectures, guaranteeing a prescribed quality of service for each application.

Neither of the two is trivial.

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Process-to-FPGA CoMPSoC

Matlab/C/C++/Java for j = 1:1:N, [x(j)] = S1 ( ); end for i = 1:1:K, [y(i)] = S2 ( ); end for j = 1:1:N, for i = 1:1:K, end [y(i), x(j)] = func(y(i), x(j) ); end for i = 1:1:K, [Out(i)] = Sink ( y( I ) ); end conversion FPGA Parameterized Nested Loop Programs S1 S2 parallel specification F1 F2 F3 F4 mapping Sink

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Why FPGA ?

A

Field Programmable Gate Array

transistor

channels. hardware programmable

blocks, even ISA components.

(FPGA) is a billion

, i.e., (re-)configurable,

single-chip fabric consisting of a huge amount of

look-up tables, memory cells, and mesh interconnect

Current FPGAs include high-level functional An FPGA CoMPSoC is (much) more flexible, and (much) cheaper than a custom designed CoMPSoC.

An FPGA CoMPSoC comprising many software and hardware processing components in a run-time re-configurable network is feasible. Limitations are only coming from restricted on-chip memory resources. 01EMBSYST2008 Ed F.Deprettere

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The Big Picture

Sequential program →

parallel specification – platform Applications FPGA

again CoMPSoC

sequential process

platform

Mem Mem Mem ...

Communication Structure Mem ...

Component 01EMBSYST2008 Ed F.Deprettere

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The Bigger Picture

High-level Models Explore, modify, select instances

SESAME (UvA)

Common XML Interface Platform Spec in XML Application

Compaan (LERC)

Kahn Process Network in XML RTL-level Models

ESPAM (LERC)

Design of Flexible Interconnection (FLUX) Network Components (TUD)

Multiprocessor System on Chip – Synthesizable VHDL and C/C++ code for processors 01EMBSYST2008 Ed F.Deprettere

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The ESPAM Design Flow

System-Level Specification

Platform Spec in XML Mapping Spec in XML KPN In XML

Library of IP cores ESPAM RTL-Level Specification Platform topology description IP cores in VHDL C/C++ code for processors Auxiliary files Xilinx Platform Studio (XPS) Tool Gate-Level Specification

Program code Processor 1 Program code Processor 2 Program code Processor 3

VirtexII-Pro FPGA

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Other platforms

FPGAs are currently powerful enough to CoMPSoC embedded systems, or even to serve as

actual product prototype

platforms that are application domain specific. System implementation in FPGAs can be done without programmers having to deal with it.

However, other – given platforms – can be target platforms as well. Examples are Intel multi-core platforms, the IBM Cell processor platform, and GPU platforms.

Lerc’s approach is independent of specific target platforms, but can deal with various platforms. 01EMBSYST2008 Ed F.Deprettere

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dim

V

Example:Motion JPEG encoder

Sequence of

T

frames dim

H Video stream (4:2:2 YUV format) JPEG encoding

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M-JPEG encoded video stream

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M-JPEG Specification (Matlab)

Parameterized

%parameter

NumFrames

%parameter

VNumBlocks

1 1000; 16 256; %parameter

HNumBlocks

8 256; Block( j , i ) [ QTables, HuffTables, TablesInfo ] =

P1_l_ DefaultTables

( );

for

k = 1:1:

NumFrames

, [ HeaderInfo ] =

P1_l_ VideoInInit

( );

for

j = 1:1:

VNumBlocks

,

for

i = 1:1:

HNumBlocks

, [ Block( j ,i ) ] =

P1_l_ VideoInMain

( );

end end for

j = 1:1:

VNumBlocks

,

for

i = 1:1:

HNumBlocks

, [ Block( j , i ) ] =

DCT

( Block( j , i ) );

end end for

j = 1:1:

VNumBlocks

,

for

i = 1:1:

HNumBlocks

, [ Block( j , i ) ] =

Q

( Block( j , i ), QTables ); [ Packets ] =

VLE

( Block( j , i ), HuffTables ); [ ] =

P1_l_ VideoOut

( HeaderInfo, TablesInfo, Packets );

end end end

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Deriving the M-JPEG Model

Application In Matlab Compaan Compiler

DCT Block Block Q Block VLE P1 Packets struct Block { int Y1[64]; /* block 8x8 pixels */ int Y2[64]; /* block 8x8 pixels */ int U[64]; /* block 8x8 pixels */ }; int V[64]; /* block 8x8 pixels */

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Mapping

PPC 1 FIFO 0 VB 1 FIFO 2 1 PPC 2 VB 2 0 VB 3 0  B 1 VB 4 0  B 2 01EMBSYST2008 Ed F.Deprettere

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Conclusion

low Embedded system architectures and the applications mapped on them are so complex, that modeling them needs to be done at abstract levels and separately.

app arch

abstraction pyramid high idea (requirements) back of the envelope

map

abstract approximate models Performance numbers high low design space cycle-accurate models synthesizable models

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Conclusion (2)

In this course I will be dealing with abstract models, mainly for streaming applications. These are dataflow models that are graphs or networks of functional actors or processes, respectively, that transform input streams of tokens to output streams of tokens.

Actor: B Process: A B A {f, g} C C [c] = f(a,b) If arguments a and b are available in input FIFO buffers A and B, and room for c is available in FIFO buffer C, then f() can fire (execute). f() is a mathematical function.

for i= 1 :1 : N, [a] = Read(A); [x] = f(a); [b] = Read(B); [c] = g(x, b); Write(c, C);

end

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Conclusion (3)

t An example: t = (N; a={a(i) | i = 1:1:N}), a block of data with header N, a parameter.

a N b p c d while(1){ [N, a] = f1(t); for i = 1 : 1 : N, [p(i), b(i)] = f2(a(i)); if p(i) = T, [c] = f3(b(i)); end if p(i) = F, [d] = f3(b(i)); end end }

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