ECE 353 Lesson Slides
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Transcript ECE 353 Lesson Slides
ECE 353
Introduction to
Microprocessor Systems
Week 14
Michael G. Morrow, P.E.
Topics
Digital versus analog
Data acquisition systems
Quantization and aliasing
Analog to Digital Converters (ADCs)
Digital to Analog Converters (DACs)
Waveform Generation
ADuC7026 Analog Peripherals
Digital Filtering and Audio Demos
Characteristics of Signals
Analog Signals
Infinite number of possible signal levels (values)
Can change at any instant to any other value
Bandwidth is potentially infinite
Analog signals are continuous in both time and value
There are no noise margins in analog!
Digital Signals
Signal level (value) only representable in fixed steps
within a finite range
Only know the signals value at distinct instants in time
Bandwidth is limited to a finite value
Digital signals are discrete in time and value (they are
a vector of values)
Signal can be exactly identified in the presence of some
amount of noise
Why Use Digital Signals?
Pros
Digital signals can be faithfully stored and copied
Allows for numeric processing by digital computers
(digital signal processing - DSP)
Lossy and lossless data compression possible
Can mathematically represent physically unrealizable
systems
Cons
Cannot exactly represent or reconstruct the original
analog signal
Requires greater bandwidth (uncompressed)
Data Acquisition Systems
Block Diagram
Isolation/Buffering
Amplification
Bandwidth-limiting
Sample and Hold
Analog-to-Digital Converter (ADC)
Shannon’s Sampling Theorem
FS > 2FMAX
Aliasing
Must be prevented - it can not be detected in the data
Anti-aliasing Filters
Data Acquisition Systems (cont)
Quantization
An ADC converts a continuous signal to a
discrete digital value at each sample point
The ADC uses some scheme to map the
analog value to a digital code
We will only discuss uniform (linear)
quantization
Quantization Noise
There is always uncertainty as to what the
actual value of the analog signal value was
This is manifested as quantization noise
Types of ADCs
Parallel (Flash) Converters
Successive Approximation Converters
Pipelined Converters
Also other types
Integrating (Dual-Slope) Converters
Slow, but noise immunity very good, can’t alias
Sigma-delta Converters
Commonly used for high resolution (16-24 bits)
audio signal conversion at 44.1KHz or higher
Dramatically reduce anti-aliasing filter
requirements by oversampling
Digital to Analog Converters (DACs)
Device Characteristics
Coding scheme
Output type and range
Resolution
Accuracy
Ideal DAC transfer characteristic
Errors
Offset
Gain
Nonlinearity
Latency and settling time
Output glitching
Digital to Analog Converters (DACs)
PWM DAC
R-2R Ladder DAC
Each input bit controls an analog switch
Op amp converts current sum to voltage
Reconstruction filters
What was the value of the signal between
the samples?
Waveform Generation
DACs allow the generation of analog
waveforms under digital control
Example – generate sinusoid
VOUT = VMAXsin(2πft)
Calculate directly as a function of t
Calculate as a function of the desired
signal phase
Use lookup table to obtain sin/cos values,
use index as a phase accumulator
Use complex vector rotation
ADuC7026 Analog Peripherals
12-channel, 12-bit successive
approximation ADC operating at up to
1MS/s
Bootloader code uses factory-programmed
values to compensate for ADC gain and offset
errors
Four 12-bit voltage output DACs
On-chip precision 2.5V voltage reference
External capacitor required
On-chip temperature sensor (+/-3°C)
Digital Filters
We can implement filters digitally that
operate on digital signals
Advantages
No temperature/aging/drift characteristics
Repeatability
Can create identical filters
Implementation
Finite Impulse Response
No feedback
Stability guaranteed
Infinite Impulse Response
Uses feedback
Can be unstable
DSP Demos
Hardware
Quantization
Aliasing
FIR filter
Audio Equalizer
Audio Effects
Echo
Flanger
Tremelo
Frequency Translation
Subharmonic Synthesis
Karplus-Strong
Guitar Synthesizer
Vocoder
Wrapping Up
Homework #7 is due on Friday, May 11th
Final Exam is on Wednesday, May 16th, at
12:25pm, in room 2255EH
Coverage is over all course material
Pipelined ADC
Conversion is performed in stages by lower
resolution (faster!) ADCs.
+
Vin
ADC
n
+
2n
-
DAC
ADC
CONTROL LOGIC
CLOCK
m*n
DATA
EOC
CONV
n
DAC
2n
Parallel (Flash) ADC
Simultaneous comparison to all possible
quantized values.
VREF
n
LOGIC
VIN
Successive Approximation ADC
Compares value from DAC with input.
VIN
CMP
DAC
Dn
CONTROL
LOGIC
D0
DATA
EOC CONV
CLOCK
DSP
Hardware
TMS320C6713 DSP, 225MHz
1350 MFLOPs, 1800 MIPs
TLC320AIC23 16-bit stereo CODEC
48KHz sample rate
Audio
In
ADC
DSP
DAC
Audio
Out
Aliasing
1/FS
1/FS
Anti-aliasing Filters
1
DESIRED SIGNAL
UNDESIRED SIGNALS
0
8
0
Frequency
Anti-aliasing Filters - Ideal
1
Gain
SIGNAL WILL ALIAS IF NOT
FILTERED OUT BEFORE ADC
DESIRED SIGNAL
0
FS/2
Frequency
FS
8
0
Anti-aliasing Filters - Ideal
1
Gain
SIGNAL WILL ALIAS IF NOT
FILTERED OUT BEFORE ADC
DESIRED SIGNAL
0
IDEAL FILTER RESPONSE
Frequency
FS
8
FS/2
0
Anti-aliasing Filters - Practical
1
DESIRED SIGNAL
SIGNAL WILL ALIAS IF NOT
FILTERED OUT BEFORE ADC
0
8
0
Ideal F S/2
Frequency
Anti-aliasing Filters - Practical
1
DESIRED SIGNAL
SIGNAL WILL ALIAS IF NOT
FILTERED OUT BEFORE ADC
0
Ideal F S/2
PRACTICAL FILTER
RESPONSE
8
0
Frequency
Anti-aliasing Filters - Practical
1
DESIRED SIGNAL
SIGNAL WILL ALIAS IF NOT
FILTERED OUT BEFORE
ADC
0
INCREASED F S TO COMPENSATE
FOR PRACTICAL FILTER
FS/2
8
0
Frequency
Uniform Quantization
Error function
Ideal DAC Transfer Characteristic
7/8
VOUT / VFS
6/8
5/8
4/8
3/8
Ideal transfer
characteristic
2/8
1/8
0
0
1
2 3 4 5
Digital Input
6
7
DAC Errors – Offset Error
7/8
VOUT / VFS
6/8
5/8
4/8
3/8
Ideal transfer
characteristic
2/8
1/8
1/2 LSB
offset error
0
0
1
2
3
4
5
Digital Input
6
7
DAC Errors – Gain Error
offset error must be
zero to determine
gain error
7/8
VOUT / VFS
6/8
1 LSB
gain error
5/8
4/8
3/8
Ideal transfer
characteristic
2/8
1/8
0
0
1
2 3 4 5
Digital Input
6
7
DAC Errors – Nonlinearity
Errors
VOUT / VFS
Differential Non-Linearity (DNL)
DNL = actual_step – ideal_step
DNL is calculated for each step
If DNL<-1, the DAC is not
monotonic
Integral Non-Linearity (INL)
code
INL
DNL
0
INL is calculated for each
output code
DNL and INL are normal specified
as worst-case values
7/8
Ideal transfer
characteristic
6/8
5/8
4/8
3/8
offset and gain
error must be zero
to determine
linearity errors
2/8
1/8
0
0
1
2 3 4 5
Digital Input
6
7
Digital
Filters
z-1
x[n]
h[0]
h[1]
z-1
h[2]
z-1
z-1
h[3]
h[m]
y[n]
Finite Impulse Response (FIR) Filter
-a[1]
-a[2]
z-1
x[n]
b[0]
b[1]
-a[3]
z-1
b[2]
-a[m]
z-1
b[3]
z-1
b[m]
y[n]
Infinite Impulse Response (IIR) Filter
Reconstruction Filters
Back to our sampled
signal – a sinusoid at
¼FS
1/FS
Magnitude
How do we make the
DAC output look like
the original input
signal?
FS/2
FS
2FS
Frequency
3FS
PWM DAC
Use PWM digital output driver
LPF removes most of AC components
VPWM
VOUT
VPWM
VOUT
VAVERAGE
Vout Vavg 1 an cos( 2ft * n) bn sin( 2ft * n)
R2R Ladder DAC
Resistive current divider network
Op amp does current summing
ITOT
RF
VREF
2R
I
I/2
I/2
R
2R
I/4
I/4
R
2R
I/8
I/8
2R
VOUT
+
FIR Filter
The output y is the sum of the products
of the last m samples x and the filter
coefficients h.
z-1
x[n]
h[0]
h[1]
z-1
h[2]
z-1
h[2]
z-1
h[m-1]
y[n]
Finite Impulse Response (FIR) Filter
Audio Equalizer
Audio Effects - Echo
Audio Effects - Flanger
The delay B is varied sinusoidally.
Audio Effects - Tremelo
Error in diagram – audio signal comes
in where the sine generator is shown,
modulating sinusoid comes in on upper
port.
Audio Effects –
Frequency Translation
Audio Effects –
Subharmonic Synthesis
Karplus-Strong
Queue is filled with noise to start.
Output is the sum of the two elements at the
head of the queue multiplied by a decay factor.
Output is fed back into the queue.
Vocoder
Uses the frequency spectrum of one signal to
control the frequency response of the other
signal.
Can also use white noise as the modulated signal.