Transcript No Slide Title

UCSB Testing Status
Anthony Affolder
(for the UCSB module testing group)
•Current testing infrastructure
•Test results
•Module test equipment needs
•Software Needs
•Current testing through-put
L3 Testing Meeting March 7, 2003
UCSB Status-Anthony Affolder
Slide 1
Testing Facilities Readiness
• Clean room adjacent to
production area


Room layout finished
Currently in high bay with
intentionally same layout
– Missing only hybrid
thermal cycling test

Clean room will be
finished in April
• Storage cabinet with dry
air flow in place for
testing phase
• Long term module
storage cabinets under
construction at KSU
L3 Testing Meeting March 7, 2003
UCSB Status-Anthony Affolder
Slide 2
UCSB Recent Infrastructure Projects
• Hybrid holding plates


Matches hybrid thermal cycling test
stand
Can bond and test with low noise in
same holder
• Burn-in low voltage distribution
crate
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LED indicators and fuse protection
• Crowbar
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HV protection circuit
12 each for FNAL/UCSB
• Module cold plate

Attaches to current module holder
• Hybrid clamshell
• Module clamshell
L3 Testing Meeting March 7, 2003
UCSB Status-Anthony Affolder
Slide 3
Hybrid Visual Inspection
• Once FNAL indicated lift
off problem, closely
visually inspected our 5
hybrids

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Found 1 wire bond lift off
Bonds have redundancy so
no failure seen
– Removed broken bond to
eliminate chance of short

Will closely monitor for lift
off/ wire breaks throughout
production process
L3 Testing Meeting March 7, 2003
UCSB Status-Anthony Affolder
Slide 4
Current UCSB ARC Setup
• 3 ARC Controller + 5
new ARC FE + 1 old
ARC FE
Hybrid Clamshell
ARC crate
• 1 Hybrid testing
(2 Hybrid clamshells)
• 2 Module testing
(Module clamshell)

DEPP
Module Clamshell
L3 Testing Meeting March 7, 2003
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2 LED systems
DEPP HV supply
ARC Controller
LED Controller
UCSB Status-Anthony Affolder
– Missing hybrid-to-utri
adapters to fully use
capacity
Slide 5
ARC Hybrid Test Results (1)
• 5 hybrids tested on arrival


All good, but fail current requirement
given in the Procedures for Module
Testing
Pedestal test reproducible, but noise
measured very sensitive to digitization
effects
– Measured noise varying the pedestal by
changing VPSP value
– Digitization effects cause variations
larger than ±20%
• Hybrid noise requirements should be
changed


Ni within 50% of average
0.3 < Ni < 1.5
– Removes chance of chips with
uniformly low/high noise from passing
requirements
•
See hep.ucsb.edu/cms/cmsUCSB.html for
more complete description
L3 Testing Meeting March 7, 2003
UCSB Status-Anthony Affolder
Slide 6
ARC Hybrid Test Results (2)
• 4 hybrids have had APV
bonded to pitch adapters

All channels are good
• Hybrid clamshells enable
testing without large pickup
effects at chip edges


Hybrid isolated with base plate
and lid grounded
Same requirements can be made
for hybrids with or w/o PA
bonded
L3 Testing Meeting March 7, 2003
UCSB Status-Anthony Affolder
Slide 7
ARC Gain Measurements (1)
• Multi-point gain added to
ARCS 6.0 beta software

Thanks to the Aachen group
• Tests are very quick and have
advantages over pulse shape
measurements

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

More uniform
More stable
Gain linearities
Gain variations
• Strongly suggest that test be
added to all M800 production.
Will be included TOB testing

Make requirements on gain
slope, offset and fit c2
L3 Testing Meeting March 7, 2003
UCSB Status-Anthony Affolder
Slide 8
ARC Gain Measurements (2)
• 2 of 24 chips so far have
no response with low
injection values

Only occurs in peak mode
inverter on
• Caused by initialization
defaults in ARCS tests

VPSP set too low
– Thanks to T. Franke and
M. Raymond for help
• VPSP setting will be
modified in new release

Removes all seen
irregularities
L3 Testing Meeting March 7, 2003
UCSB Status-Anthony Affolder
Slide 9
ARC Module Test Results (1)
• 1 Prototype Module Tested
• 1 Production Module Tested

Module testing in UCSB
clamshell decreases
common-mode noise to the
point where location of
opens become detectable
by their noise levels
– PA-sensor
– Sensor-sensor
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PEAK ON
Pinholes act as if saturated
High current channels can
have higher noise (Bad
IStrip
Slight noise increase on
chip edges
Two neighboring channels
have high noise only in
peak inverter on
L3 Testing Meeting March 7, 2003
Unknown Problem
Bad CAC
Bad Istrip
Sensor-sensor open
PA-sensor open
UCSB Status-Anthony Affolder
Pinhole
Slide 10
ARC Module Test Results (2)
PEAK ON
• LED pinhole test


Bonded one inherent
pinhole on purpose
Test acted as expected
Unknown Problem
Pinhole
– 120 mA needed to
unsaturate pre-amp

Not clear if maximum
current (400 mA) supplied
sufficient to find “high
current” pinholes
PA-sensor open
Sensor-sensor open
L3 Testing Meeting March 7, 2003
UCSB Status-Anthony Affolder
Slide 11
ARC Module Test Results (3)
PEAK ON
Pinhole
PA-sensor open
Unknown Problem
Bad CAC
Bad Istrip
Sensor-sensor open
• Gain test
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L3 Testing Meeting March 7, 2003
Pinhole clear by lack of gain
Opens clear by higher gain
UCSB Status-Anthony Affolder
Slide 12
ARC Test X-calibrations
• Minimal X-calibration has been performed


Same faulty channels found at FNAL/UCSB on
prototype model
CERN FHIT/UCSB ARC test compared
– Pedestals very similar
– Noise is slightly higher than CERN FHIT measurement
Not understood if it is FHIT/ARC difference, a software
difference, an environmental difference, or a digitization effect
• Once model production begins, plan to exchange
modules with FNAL for X-calibration
L3 Testing Meeting March 7, 2003
UCSB Status-Anthony Affolder
Slide 13
ARCS Database
• No entries yet put into official database

Waiting for ARCS interface for database upload and
database definition to stablize
• All testing results have been made available to
silicon community on local website

hep.ucsb.edu/people/affolder/module_test_UCSB.html
L3 Testing Meeting March 7, 2003
UCSB Status-Anthony Affolder
Slide 14
DAQ status
• 1 full DAQ stand available at UCSB

Planned only for Vienna box tests with modules
• Limited number of tests performed



See P. Gartung’s talk
Focus on bringing up hardware/software for Vienna box
Xdaq, LT, and Xrod software all compiled and run
– Still working to understand controls/output
• No LED stand planned for DAQ
• No database work done as of yet
L3 Testing Meeting March 7, 2003
UCSB Status-Anthony Affolder
Slide 15
Vienna Box Status
• Vienna Box recently arrived at UCSB
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No modification necessary to use with TOB module
carrier plates
Full compliment of plates currently in machine shop
LV distribution ready
Just received HV controllers (both the A128HS and
A1303)
– Integrating as fast as possible
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Demonstrated each slot works with hybrids
Thermal cycled box between –25 to 30° C with chiller
Need hardware to test more than one channel at a time
– See P. Gartung’s talk for more details
L3 Testing Meeting March 7, 2003
UCSB Status-Anthony Affolder
Slide 16
Current Hardware Needs
• Hybrid thermal cycling box
• ARC Needs
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1 DEPP
1 LED system
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– Will be picked up this week
• Torino Interlock Box
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In-route
• 3 Electrometers
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Under construction at UCSB
• 13 hybrid-to-utri ver. D
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• DAQ components
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1 in-route
– Used for both ARC module
and burn-in test
– Limiting factor in testing
through-put
L3 Testing Meeting March 7, 2003
8 VUTRI
– 10 in-route
2 in-route
• Flat cable-Lemo adapter
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
Lack hardware/software
Tests will be performed by A.
Honma’s group for M800
We are aiding in the
manufacturing of test stand
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9 PAACB
– 6 in-route
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1 TPO
– 1 in-route
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1 CCU
– 1 in-route
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2 PAACB to TPO interface
– Needed for backplane pulsing
UCSB Status-Anthony Affolder
Slide 17
Current Testing Software Needs
• Hybrid Characterization
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Database input
• Module Testing
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IV scan, backplane pulsing test, database input
• Module Burn-in
• Rods
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Beginning to assemble necessary infrastructure for rod
assembly/ burn-in
Xrod and LT software package already compiled and
running
L3 Testing Meeting March 7, 2003
UCSB Status-Anthony Affolder
Slide 18
Current Estimated Testing Through-put
• Hybrid Arrival Testing
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• Module Burn-in (Vienna Box)
24 hybrids per day
Matches peak production
(+ contingency)
Requires dedicated tech
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– While burn-in test underway, no
module testing possible
• Module Basic Test
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2 ARC LED stands but only
1 hybrid-to-utri version D
12 modules per day
Requires dedicated tech
Module characterization test will
be done at beginning/end of test
cycles
• ARC After Burn-in Test

Time estimates do not include database entry.
After finishing test equipment acquisition/integration,
database will be first priority.
L3 Testing Meeting March 7, 2003
See P. Gartung’s talk for details
Lack of hybrid-to-utri adapters
limits testing through-put to 1
Not clear how much ARC testing
necessary after burn-in
– Depends on grounding/pickup
issues
– LED is minimal test
UCSB Status-Anthony Affolder
Slide 19