Transcript EKT 121 / 4 ELEKTRONIK DIGIT 1

CHAPTER 3
Sequential Logic/ Circuits:
Shift Register
Shift Register
 Basic shift register function
 Serial in/Serial out shift registers (SISO)
 Serial in/Parallel out shift registers (SIPO)
 Parallel in/Serial out shift registers (PISO)
 Parallel in/Parallel out shift registers
(PIPO)
 Bidirectional shift registers
Basic Shift Register Functions
 The Shift Register is another type of sequential
logic circuit that can be used for the storage or the
transfer of data in the form of binary numbers.
This sequential device loads the present data on its
inputs and then moves or “shifts” it to its output
once every clock cycle, hence the name “shift
register”.
Basic Shift Register Functions
 Consist of an arrangement of flip-flops
 Important in applications involving storage and
transfer of data (data movement) in digital system
 Used for storing and shifting data (1s and 0s)
entered into it from an external source.
 Generally, D flip-flops are usually used to store and move
data.
 Shift Registers commonly used inside calculators or
computers to store data such as two binary numbers
before they are added together, or to convert the data
from either a serial to parallel or parallel to serial format.
The flip-flop as a storage element
When a 1 is on D, Q
becomes a 1 at
triggering edge of CLK
or remains a 1 if already
in the SET state
When a 0 is on D, Q
becomes a 0 at
triggering edge of CLK or
remains a 0 if already in
the RESET state
Registers
 An n-bit register is a collection of n D flip-flops with a
common clock used to store n related bits.
Example:
74LS175 4-bit register
74LS175
1D
Q
D
CLR
2D
Q
D
CLR
3D
CLK
/CLR
Q
Q
D
CLR
4D
Q
Q
Q
D
CLR
Q
1Q
/1Q
CLK
CLR
2Q
/2Q
1D
3Q
2D
/3Q
4Q
/4Q
3D
4D
1Q
1Q
2Q
2Q
3Q
3Q
4Q
4Q
74LS175
Basic data movement in shift registers
(Four bits are used for illustration. The bits move in the
direction of the arrows.)
Shift Registers
 Multi-bit register that moves stored data bits left/right ( 1 bit
position per clock cycle)
– Shift Left is towards MSB
Q3 Q2 Q1
0
1
Q3 Q2 Q1
Q0
1
1
LSI
1
1
Q0
1 LSI
– Shift Right is towards LSB
Q3 Q2 Q1
RSI
0
1
1
Q0
1
Q3 Q2 Q1
RSI
0
1
Q0
1
Types of Shift Registers
 Serial In / Serial Out Shift Registers
(SISO)
 Serial In /Parallel Out Shift Registers
(SIPO)
 Parallel In / Serial Out Shift Registers
(PISO)
 Parallel In / Parallel Out Shift Registers
(PIPO)
Serial In, Serial Out Shift Registers
(SISO)
Serial In, Serial Out Shift Registers
(SISO)
Serial In, Serial Out Shift Registers
(SISO)
Serial In
D
Q
SRG n
Clock
CLK
D
>
SI
SO
Q
For a n-bit SRG:
Serial Out = Serial In delayed
by n clock period
CLK



D
CLK
Q
Serial Out
4-bit shift register example:
Serial in: 1 0 1 1 0 0 1 1 1 0
Serial out: - - - 1 0 1 1 0 0 1
Clock:
Serial In, Parallel Out Shift registers
(SIPO)
 Data bits entered serially (right-most bit first)
 Difference from SISO is the way data bits are taken out of the register – in
parallel.
 Output of each stage is available
Serial In, Parallel Out Shift registers
(SIPO)
Serial In
D
Clock
CLK
D
Q
1Q
Q
2Q
SRG n
SO
1Q
2Q



nQ
Serial to Parallel Converter
>
SI
CLK



D
CLK
Q
nQ
Example: 4-bit shift register
Serial in: - 1 0 1 1 0 0 1 1 1
1Q:
- 101100111
2Q:
- - 10110011
3Q:
- - - 1011001
4Q:
- - - - 101100
clock:
Example:
The states of 4-bit register (SRG 4) for the data input and clocks
waveforms.
Assume the register initially contains all 1s
Parallel In, Serial Out Shift Registers
(PISO)
 The PISO shift register acts in the opposite way to the SIPO one above.
 The data is loaded into the register in a parallel format in which all the data
bits enter their inputs simultaneously, to the parallel input pins PA to PD of the
register.
 The data is then read out sequentially in the normal shift-right mode from the
register at Q representing the data present at PA to PD.
 This data is fetched out one bit at a time on each clock cycle in a serial
format.
Parallel In, Parallel Out Shift Register (PIPO)
• the parallel data is loaded simultaneously into the
register, and transferred together to their
respective outputs by the same clock pulse.
SUMMARY -Types of Shift Registers
Generally, shift registers operate in one of four different modes
with the basic movement of data through a shift register being:
1) SIPO - the register is loaded with serial data, one bit at a time, with the
stored data being available in parallel form.
2) SISO - the data is shifted
serially "IN" and "OUT" of the
register, one bit at a time in
either a left or right direction
under clock control.
3) PISO - the parallel data is
loaded into the register
simultaneously and is shifted
out of the register serially one
bit at a time under clock control.
4) PIPO - the parallel data is loaded simultaneously into the register, and
transferred together to their respective outputs by the same clock pulse.
Bi-directional Universal Shift Registers
 4-bit multi-function devices that can be used in
either serial-to-serial, left shifting, right shifting,
serial-to-parallel, parallel-to-serial, or as a parallel-toparallel multifunction data register, hence the name
“Universal”.
Data can be shifted left/right/up/down but require
additional inputs to specify desired function and to
pre-load and reset the device.
74HC194 is an bidirectional universal shift register
Bi-directional Universal Shift Registers
11
1
Modes:
Hold
Load
Shift Right
Shift Left
10
9
7
6
5
4
3
2
CLK
CLR
S1
S0
LIN
D
C
B
A
RIN
74x194
R
QD
QC
QB
QA
L
12
13
14
15
4-bit Bi-directional Universal (4-bit) PIPO
Function
Hold
Shift right/up
Shift left/down
Load
Mode
S1 S0
0
0
0
1
1
0
1
1
Next state
QA* QB* QC*
QA QB QC
RIN QA QB
QB QC QD
A
B
C
QD*
QD
QC
LIN
D
Bi-directional Universal Shift Registers