Transcript Document
APV25s1 STATUS Testing started beginning September 1 wafer cut, others left for probing 10 chips mounted on test boards 9 work well all I2C registers read/writeable no obvious pipeline defects (run with pseudo-random trigger after single reset) pulse shape OK for one channel 1 chip with obvious analogue problem 1 channel pedestal stuck high and low gain in others Detailed results here confined to few chips so far Outline Performance of S1 chip version (early results) Pulse shape, linearity, noise, pipeline uniformity, radiation tests Conclusions Mark Raymond [email protected] Oct, 2000 CMS Tracker Electronics 1 Wafer layout ~ 390 viable APV25s1 sites / wafer Oct, 2000 CMS Tracker Electronics 2 Wafer detail showing reticule reticule consists of 4 APVs 1 APVMUX/PLL test structures Oct, 2000 CMS Tracker Electronics 3 7.1 mm APV25s1 layout 8.1 mm design changes input edge layout changes to reduce track resistance (input pad layout changed) calibration capacitor layout improved gain increased (resistor values at mux input stage) added internal master current reference for bias generator (backend pad layout changed from s0 version) digital bug in pipeline logic fixed minor tweaks to component values to achieve greater margins for operation (shaper feedback resistance) Oct, 2000 CMS Tracker Electronics 4 Output data frame Raw data frame 4 2 Digital header 1 mip 0 Current [mA] -2 -4 Analogue part of data frame software reordered 4 Actual channel order 2 0 -2 -4 Samples at 50 nsec. intervals differential current output (+ve o/p only shown above) nominal (mid-range) gain now 1.2 mA/mip variable between 0.8 and 1.5 in 5 steps Oct, 2000 CMS Tracker Electronics 5 APV25s1 biasing internal/external option determined by 2 pads (IREF & IREFBIAS) mode IREF IREFBIAS IVDD[mA] external internal 128mA (R to VDD) disconnect VDD GND 94 89 IVSS[mA] 156 143 (VDD=2.5, GND=1.25, VSS=0) recommended bias settings (decimal) (preliminary) if external bias at 128 mA IPRE IPCASC IPSF ISHA ISSF IPSP IMUXIN VFP VFS 85 45 30 ~ 30 tune for optimum pulse rise time 30 48 30 ~ 30 ~ 60 tune for optimum pulse fall time NOTE: These current values are ~70% less than those for s0 (current mirroring ratio changed) Oct, 2000 CMS Tracker Electronics 6 Pulse shape dependence on input capacitance 2pF 4p1 8p1 10p7 14p5 17p5 20p5 125 100 75 50 25 0 0 50 100 150 200 250 time [nsec.] Peak mode pulse shape tuned (shaper amplifier bias settings) for each value of input capacitance ISHA: 21 -> 65 VFS: 63 -> 50 Oct, 2000 (I2C register setting ~ roughly = mA) CMS Tracker Electronics 7 Pulse shape dependence on shaper feedback resistor control voltage VFS 200 VFS value (decimal) 180 160 160 ADC units 140 120 120 100 80 80 60 40 20 0 40 0 0 25 50 75 100 125 150 175 200 225 250 time [nsec] Feedback FET length slightly reduced from S0 version to ensure short enough time constant achievable with margin optimum value here ~ 60 (decimal) Oct, 2000 CMS Tracker Electronics 8 Linearity 500 400 ADC units Input signal charge injected in 0.5 mip steps from 0.5 to 7 mips. 300 200 100 0 0 7 6 5 4 3 2 1 0 50 100 150 200 250 time [nsec.] peak mode deconvolution 0 1 2 3 4 5 6 input signal injected [mips] 7 output normalised to input at 1 mip point linearity good up to 3 mips, gradual fall off beyond Oct, 2000 CMS Tracker Electronics 9 Gain/calibration uniformity Calibration capacitor layout improved Calibration response of all 128 channels superimposed ADC units 150 100 50 0 0 20 40 60 80 100 3.125 nsec steps Pulse peak height dependence on channel number ADC units 150 100 50 0 0 32 64 96 128 20 entries:128 16 mean:131.0 1.91 12 sigma: min:127.3 8 max: 134.6 4 0 100 120 channel no.(mux order) 140 peak ht. [ADC units] Good channel matching Oct, 2000 CMS Tracker Electronics 10 Noise Dependence on input capacitance ENC [rms electrons] 2000 1600 closed symbols: peak mode: 270 + 38/pF open symbols:deconvolution: 430 + 61/pF 1200 800 chan 2 chan 43 chan 107 400 0 -10 -5 0 5 10 15 20 25 Input capacitance [pF] No dependence on channel number < 2000 electrons achievable for detectors < 25 pF Oct, 2000 CMS Tracker Electronics 11 Pipeline - pedestals Pedestal dependence on pipeline location ADC units 2.0 channel 19, peak mode 1.0 0.0 -1.0 -2.0 0 32 64 96 128 pipeline location 160 192 Measure for every channel, take rms value, convert to electrons and histogram frequency 20 peak mode deconvolution 15 10 5 0 0 25 50 75 100 125 150 rms electrons No significant noise contribution Oct, 2000 CMS Tracker Electronics 12 Pipeline – gain uniformity How well do pipeline capacitors match? Signal retrieved as charge so mismatch => gain dependence on pipeline capacitance Measure by storing/retrieving signal to/from every cell 50 192 entries mean 122.7 sd 0.86 min 120.6 max 125.7 frequency 40 30 20 10 0 0 50 100 ADC units 150 Very good matching between pipeline cells Oct, 2000 CMS Tracker Electronics 13 Radiation tests 1chip irradiated to 10 Mrads using 50 kV X-rays ADC units before after 10 Mrads 500 400 300 200 100 0 500 400 300 200 100 0 0 50 100 150 200 250 0 50 100 150 200 250 time [nsec.] minor retuning of pulse shape required after irradiation Noise – histogram all channels peak mode deconvolution before after 10 Mrads 0.0 0.5 1.0 1.5 2.0 rms ADC units 2.5 3.0 Almost no observable degradation after 10 Mrads (confirms results from s0 run) Oct, 2000 CMS Tracker Electronics 14 Probe testing plans for APV25s1 New probe card made (only needs active and decoupling components to be added) similar (functionally) to s0 version except multiple (3) probes for power on front edge 1 amplifier input probed allowing true chip gain to be determined Additions to test software measure pulse height for probed channel test multi-mode operation sweep one bias setting measuring power supply currents Tested die should be available early November Oct, 2000 CMS Tracker Electronics 15 APVMUX/PLL status Oct, 2000 CMS Tracker Electronics 16 Conclusions Early APV25s1 results indicate good performance consistent with results from APV25s0. Minor problems fixed. Oct, 2000 CMS Tracker Electronics 17