Rabbit 3000 - Electromate Industrial Sales Ltd.

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Transcript Rabbit 3000 - Electromate Industrial Sales Ltd.

Rabbit 4000
Major Features/Subsystems
Larry Cicchinelli [email protected]
Puck Curtis
[email protected]
[email protected]
Rabbit 4000 Block Diagram
Battery Backable
Real Time Clock
DMA
Controller
Integrated
Ethernet
Auxiliary I/O
Data & Address
Bus
Parallel & Bitwise
I/O ports
A, B, C, D, E
Watchdog
Timer
Glueless
Memory and I/O
Chip Control
External
Memory and I/O
Bus Interface
Asynchronous Serial
(IrDA Capable)
A, B, C, D, E, F
Synchronous
Serial & SPI
A, B, C, D
Internal Address/Data Bus
®
Rabbit
4000
SDLC & HDLC
(IrDA Capable)
E, F
Cascadable
8-bit Timer
System (A)
System/User
Hardware
Spectrum
Spreader
(Low EMI)
Clock
Doubler
External
Interrupt Inputs
Input Capture &
Pulse Width
Measurement
Quadrature
Decoder
Power Save
and Clock
Control
PWM
Outputs
10-bit Timer
System (B)
Fast
Oscillator
32.768 kHz
Clock Input
Slave
Interface
16-bit Timer
System (C)
Encryption &
Chip Security
Periodic Interrupt
(488 mS)
Remote
Bootstrap
Major Features/Subsystems
• 60MHz Maximum Clock Frequency
• 128 pin LQFP
– not compatible with Rabbit 3000
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Low Power Operation
20 to 24 bit Address Bus – up to 16 MB
Up to Six Memory Chips – 96 MB
Support for 16 bit memories
Major Features/Subsystems
(cont’d)
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1.8V core with 1.8 - 3.3V I/O
Inputs are 3.3V tolerant (not 5V!)
Hardware Debugging Enhancements
10BaseT Ethernet – MAC and Phy
– Analog part is external
• 8 DMA Channels
• Low EMI
Major Features/Subsystems
(cont’d)
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Five 8-bit Parallel Ports
Six Serial Ports
Ten 8 bit Timers (Timer A)
One 10 bit Timer with 2 Match Registers
– TimerB improvements
• One 16 bit Timer with 4 Independent
Outputs (Timer C)
• Four PWM Channels
Major Features/Subsystems
(cont’d)
• Two Quadrature Decoder Channels
• Two Input Capture Channels
– Enhanced over Rabbit 3000
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Slave Port Interface
Six External Interrupt Inputs
External I/O Interface
Built-in Real Time Clock
Two Watchdog Timers
Parallel Ports Summary
• Five Parallel Ports
• Port Pins shared among the Peripheral Devices
• Ports C, D & E: each output bit is individually
configurable as either push-pull or open drain.
• Ports D & E contain output preload registers
that can be synchronously clocked into the
output registers via timer control.
• Ports D & E have individual bit registers
Parallel Ports
Port A
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Parallel I/O (all input or all output) or
Auxiliary External I/O Data Bus or
Slave Port Data Bus
Selected via SPCR
The above usages are mutually exclusive.
Parallel Ports (cont’d)
Port B
• Parallel I/O
• 6 or 8 Address Lines for Auxiliary External
I/O
• Clocks for Serial Ports A and B in SPI mode
• Control Lines for Slave Port
• Selected via SPCR
Parallel Ports (cont’d)
Port C Alternate Outputs
Bit
7
6
5
4
3
2
1
0
Alt Out 0 Alt Out 1
TxA
I7
TxA
I6
TxB
I5
TxB
I4
TxC
I3
TxC
I2
TxD
I1
TxD
I0
Alt Out 2
PWM 3
PWM 2
PWM 1
PWM 0
Timer C3
Timer C2
Timer C1
Timer C0
Alt Out 3
SCLK C
TxE
RCLK E
TCLK E
SCLK D
TxF
RCLK F
TCLK F
Parallel Ports (cont’d)
Port C Inputs
Bit
7
6
5
4
3
2
1
0
InputCapture
Y
N
Y
N
Y
N
Y
N
RxA
RxE
RxB
RClkE
TClkE
RxF
RxC
RxD
RClkF
TClkF
Parallel Ports (cont’d)
Port D Alternate Outputs
Bit
7
6
5
4
3
2
1
0
Alt Out 0 Alt Out 1 Alt Out 2 Alt Out 3
IA7
TxA
IA6
TxB
IA7
SCLK C
IA6
SCLK D
I7
I6
I5
I4
I3
I2
I1
I0
PWM 3
PWM 2
PWM 1
PWM 0
Timer C3
Timer C2
Timer C1
Timer C0
SCLK C
TxE
RCLK E
TCLK E
SCLK D
TxF
RCLK F
TCLK F
16 Bit
Data Bus
D15
D14
D13
D12
D11
D10
D09
D08
Parallel Ports (cont’d)
Port D Inputs
Bit
7
6
5
4
3
2
1
0
Inp. Cap.
Y
RxA
N
Y
RxB
N
Y
DReq1 QRD2A RxC
N
DReq0 QRD2B SClkC
Y
Int1 QRD1A RxD
N
Int0 QRD1B SClkD
RxE
RClkE
TClkE
RxF
RClkF
TClkF
Parallel Ports (cont’d)
Port E Alternate Outputs
Bit
7
6
5
4
3
2
1
0
Alt Out 0 Alt Out 1
I7
/ACT
I6
I5
/LINK
I4
/A0
I3
A23
I2
A22
I1
A21
I0
A20
Alt Out 2
PWM 3
PWM 2
PWM 1
PWM 0
Timer C3
Timer C2
Timer C1
Timer C0
Alt Out 3
SCLK C
TxE
RCLK E
TCLK E
SCLK D
TxF
RCLK F
TCLK F
Parallel Ports (cont’d)
Port E Inputs
Bit
7
6
5
4
3
2
1
0
Inp. Cap.
Y
N
Y
N
Y
N
Y
N
DReq1
DReq0
Int1
Int0
DReq1
DReq0
Int1
Int0
QRD2A RxA
RxE
QRD2B
QRD1A RxB RClkE
QRD1B
TClkE
QRD2A RxC
RxF
QRD2B SClkC
QRD1A RxD RClkF
QRD1B SClkD TClkF
Rabbit CPU Registers
8 bit
16 bit
Accum
Flags
A
F
HL
General
B, C, D,
E, H, L
BC, DE
BCDE,
JKHL
B, C, D,
E, H, L
IX, IY
PW, PX,
PY, PZ
IX, IY,
PW, PX,
PY, PZ
Index
32 bit
Alternate
A, HL
F
DC Characteristics
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Core Voltage = 1.8v
I/O Voltage = 1.8v to 3.6v
3.6v tolerant inputs (not 5v)
I/O buffers can sink and source 6ma
Current consumption proportional to
operating speed
Low Power Operation
Low Power Operation
Sleepy Mode
Low EMI
• Separate Power Pins for CPU Core and I/O
– Reduces EMI by 15db
• Spectrum Spreader
– Reduces EMI by 15db
– Three Modes: off, weak and strong
• typically <10 dB µV/m @ 3 m
Low EMI (cont’d)
Spectrum Spreader
Spectrum Spreader
Serial Ports
• Six Serial Ports
• All capable of standard UART operation
• All capable of IrDA bit timing
– SIR ( Serial IR ) - 3/16 bit timing at 115K bps
– MIR ( medium IR ) - 1/4 bit timing at 1.152M
bps
• 4 Ports capable of SPI
Serial Ports (cont’d)
• 2 Ports capable of HDLC/SDLC
• Improvements over Rabbit 3000
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Bit Reversal for SPI (MSB first)
Dedicated 15 bit baud divider
Single Port Tx/Rx: I2C and 1-wire
Hardware parity
Timer A
• All ten are presetable, 8 bit down counters that
divide by N+1
• A2 – A7
– Can be used by the UARTs
– Can be driven by Timer A1, Pclk/2 (default) or Pclk
• A1 – A7 can generate interrupts
– All use the same ISR and priority
• A8, A9 & A10 drive specific peripherals
Timer B
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Ten bit, free running up counter
Two Match Registers
Two Step Registers – enables divide by N
Can generate interrupt when counter value
matches either/both Match Registers
• Match conditions can also be used to synchronize
parallel port outputs
• Driven by Timer A1, Pclk/2 (default) or Pclk/16
Timer C
• 16 bit, free running, programmable up
counter to control the frequency
• Four independent pulse outputs
• All four have the same frequency
• Each of the four can be independently
started and stopped at any count
PWM
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Four independent PWM channels
Ten bit resolution
All four run at the same frequency
Single pulse or spread of four pulses
PWM (cont’d)
• Optional interrupt at end of cycle
• Option to suppress 1 of 2, 3 of 4, or 7 of 8
pulses
• Same suppression available for interrupts
PWM (cont’d)
Waveforms
Quadrature Decoder
• Two complete channels - I and Q inputs
• Default 8 bit counter, option for 10 bits
• Can generate interrupt on both overflow and
underflow
• Built-in digital low pass filter
Quadrature Decoder
Input Filter
Input Capture
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Two Input Capture Channels
Uses timer A8 to determine resolution
16 bit counter
Three time interval modes plus count
mode
• Built-in digital low pass filter
• Select from among 12 inputs: Can
interrupt on Start and/or Stop
Slave Port Interface
• Uses Port A for the Data bus
• Uses bits from Port B for address and
control lines
• Interrupt capability
• Enables high speed multi-processor
connection
External Interrupts
• Two Interrupt Vectors (ISRs) with 3 input
sources each
• Three bit low pass filter
• Maximum Interrupt Latency = 29 clocks
• Interrupt on rising and/or falling edge(s)
• No action required to clear the interrupt
External Interrupt (cont’d)
Logic
External I/O
• Easy method of adding parallel ports
• Chip designs have access to 13 address bits
for a total of 64K bytes
• RCM designs allow Auxiliary External I/O
– Access 6 or 8 address lines
– Uses Port A as the data bus
• Handshake inputs to pause transactions
External I/O Block Diagram
D0..D7
A0..(A12)
Rabbit
Processor
/IOWR
/IORD
I/O
Strobe
D0..D7
A0..(A12)
/IOWR
/IORD
CS
I/O
Device
External
I/O
Block
Diagram
Built-in Real Time Clock
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32 kHz Oscillator circuit
48 bit counter good for over 100 years
Required to download via Dynamic C
Used to measure the frequency of the CPU
oscillator
• Battery Backed
• Accuracy is about +/- 3 seconds/day
Watchdog Timer
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17 bit counter
Driven by 32 kHz oscillator
Selectable timeout period: 0.25, 0.5, 1, 2 sec
Setup and “petted” by Dynamic C via the
periodic ISR within the BIOS
• User is expected to use Virtual Watchdogs
available in Dynamic C – see the Vd…
functions
Rabbit Configuration Utility
• Supports only the Rabbit 4000
• Presents a GUI for configuring the Rabbit
4000 I/O features
• Is sensitive to shared resources
• Creates a library file based on user’s
selections
More Information
• Rabbit 4000 Microprocessor User’s Manual
• Rabbit 4000 Microprocessor Designer’s
Guide
• Dynamic C Function Reference Manual
• Dynamic C User’s Manual
• http://www.rabbit.com/
• Embedded Systems Design using the Rabbit
3000 Microprocessor
Questions?