Transcript John Cavazos Institute for Computing Systems Architecture

Lecture 3
Laws, Equality, and
Inside a Cell
John Cavazos
Dept of Computer & Information Sciences
University of Delaware
www.cis.udel.edu/~cavazos/cisc879
CISC 879 : Software Support for Multicore Architectures
Lecture 2: Overview
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Know the Laws
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All are NOT Created Equal
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Inside a Cell
CISC 879 : Software Support for Multicore Architectures
Two Important Laws
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Amdahl’s Law
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Gene Amdahl observation in 1967
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Speedup is limited by serial portions
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Assumes fixed workloads and fixed problem size
Gustafson’s Law
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John Gustafson observation in 1988
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Rescues parallel processing from Amdahl’s Law
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Proposes fixed time and increasing work
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Sequential portions have diminishing effect
CISC 879 : Software Support for Multicore Architectures
Amdahl’s Law
Parallelize parts 2 and 4
with 2 processors
100
Sequential
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100
Sequential
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100
Sequential
100
Sequential
50
Sequential
50
Sequential
Speedup: 25%
CISC 879 : Software Support for Multicore Architectures
Amdahl’s Law (cont’d)
Parallelize parts 2 and 4
with 4 processors
100
Sequential
100
100
100
Sequential
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100
100
Sequential
100
Sequential
50
25
Sequential
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25
Sequential
Speedup: 40%
CISC 879 : Software Support for Multicore Architectures
Amdahl’s Law (cont’d)
Parallelize parts 2 and 4
with infinite processors
100
Sequential
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100
Sequential
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100
100
Sequential
100
Sequential
50
25
0
Sequential
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25
Sequential
Speedup: only 70%
Multicore doesn’t look very appealing!
CISC 879 : Software Support for Multicore Architectures
0
Gustafson’s Law (cont’d)
Boxes contain units
of work now!
100
Sequential
100
100
100
100
Sequential
100
100
100
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500 units of time, but
700 units of work!
Sequential
100
Sequential
200
Sequential
200
Sequential
Speedup: 40%
CISC 879 : Software Support for Multicore Architectures
Gustafson’s Law (cont’d)
Boxes contain units
of work now!
100
Sequential
100
100
100
100
Sequential
100
100
100
100
500 units of time, but
1100 units of work!
Sequential
100
Sequential
200
400
Sequential
200
400
Sequential
Speedup: 220%
CISC 879 : Software Support for Multicore Architectures
Gustafson Law (cont’d)
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Gustafson found important observation
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As processors grow, people scale problem size
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Serial bottlenecks do not grow with problem size
Increasing processors gives linear speedup
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20 processors roughly twice as fast as 10
This is why supercomputers are successful
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More processors allows increased dataset size
Reference: http://www.scl.ameslab.gov/Publications/Gus/AmdahlsLaw/Amdahls.html
CISC 879 : Software Support for Multicore Architectures
Lecture 2: Overview
•
Know the Laws
•
All are NOT Created Equal
•
Inside a Cell
CISC 879 : Software Support for Multicore Architectures
All Multicores Not Equal
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Multicore CPUs and GPUs are very different!
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CPUs run general purpose programs well
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GPUs run graphics (or similar prgs) well
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General Purpose Programs have
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Less parallelism
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More complex control requirements
GPU programs
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Highly parallel
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Arithmetic intense
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Simple control requirements
CISC 879 : Software Support for Multicore Architectures
Floating-Point Operations
32-bit FP operations per second
GPUs : more computational units and
take better advantage of them.
Slide Source: NVIDIA CUDA Programming Guide 1.1
CISC 879 : Software Support for Multicore Architectures
CPUs versus GPUs
CPUs devote lots of area to control and storage.
GPUs devote most area to computational units.
Slide Source: NVIDIA CUDA Programming Guide 1.1
CISC 879 : Software Support for Multicore Architectures
CPU Programming Model
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Scalar programming model
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No native data parallelism
Few arithmetic units
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Very small area
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Optimized for complex control
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Optimized for low latency not high bandwidth
Slide Source: John Owens, EEC 227 Graphics Arch course
CISC 879 : Software Support for Multicore Architectures
AMD K7 “Deerhound”
Slide Source: John Owens, EEC 227 Graphics Arch course
CISC 879 : Software Support for Multicore Architectures
GPU Programming Model
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Streams
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Collections of data records
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Data parallelism amenable
Kernels
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Inputs/outputs are streams
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Performs computation on each element of stream
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No dependencies between stream elements
Stream storage
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Not cache (input read once/output written once)
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Producer-consumer locality
Slide Source: John Owens (EEC 227 Graphics Arch) and Pat Hanrahan (Stream Prog. Env., GP^2 Workshop)
CISC 879 : Software Support for Multicore Architectures
Lecture 2: Overview
•
Know the Laws
•
All are NOT Created Equal
•
Inside a Cell
CISC 879 : Software Support for Multicore Architectures
Cell B.E. Design Goals
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An accelerator extension to Power
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Exploits parallelism and achieves high frequency
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Sustain high memory bandwidth through DMA
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Designed for flexibility
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Heterogenous architecture
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PPU for control, general-purpose
SPU for computation-intensive, little control
Applicable to a wide variety of applications
The Cell Architecture has characteristics of both a CPU and GPU.
CISC 879 : Software Support for Multicore Architectures
Cell Chip Highlights
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241M Transistors
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9 cores, 10 threads
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>200 GFlops (SP)
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>20 GFlops (DP)
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> 300 GB/s EIB
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3.2 GHz shipping
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Top freq. 4.0 GHz (in lab)
Slide Source: Michael Perrone, MIT 6.189 Fall 2007 course
CISC 879 : Software Support for Multicore Architectures
Cell Details
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Heterogenous multicore
architecture
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Power Processor Element
(PPE) for control tasks
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Synergistic Processor
Element (SPE) for dataintensive processing
SPE Features
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No cache
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Large unified register file
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Synergistic Memory Flow
Control (MFC)
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Interface to high-perf. EIB
Slide Source: Michael Perrone, MIT 6.189 Fall 2007 course
CISC 879 : Software Support for Multicore Architectures
Cell PPE Details
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Power Processor Element
(PPE)
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General Purpose 64-bit
PowerPC RISC processor
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2-way hardware threaded
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L1 32KB I; 32KB D
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L2 512 KB
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For operating systems and
program control
Slide Source: Michael Perrone, MIT 6.189 Fall 2007 course
CISC 879 : Software Support for Multicore Architectures
Cell SPE Details
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Synergistic Processor
Element (SPE)
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128-bit SIMD architecture
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Dual Issue
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Register File 128x128-bit
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Load Store (256KB)
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Simplified Branch Arch.
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No hardware BR predictor
Compiler-managed hint
Memory Flow Controller
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Dedicated DMA engine - Up to
16 outstanding requests
Slide Source: Michael Perrone, MIT 6.189 Fall 2007 course
CISC 879 : Software Support for Multicore Architectures
Compiler Tools
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Gnu based C/C++ compiler (Sony)
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ppu-gcc/ppu-g++ - generates ppu code
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spu-gcc/spu-g++ - generates spu code
Gdb debugger
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Supports both PPU and SPU debugging
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Different modes of execution
Slide Source: Michael Perrone, MIT 6.189 Fall 2007 course
CISC 879 : Software Support for Multicore Architectures
Compiler Tools
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The XLC/C++ compiler
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ppuxlc/ppuxlc++ - generates ppu code
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spuxlc/spuxlc++ - generates spu code
Includes the following optimization levels
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-O0: almost no optimization
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-O2: strong, low-level optimization
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-O3: intense, low-level opts with basic loop opts
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-O4: all of -O3 and detaild loop analysis and good whole
program analysis
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-O5: all of -O4 and detailed whole-program analysis
Slide Source: Michael Perrone, MIT 6.189 Fall 2007 course
CISC 879 : Software Support for Multicore Architectures
Performance Tools
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Gnu-based tools
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Oprofile - System level profiler (only PPU)
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Gprof - generates call graphs
IBM Tools
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Static analysis tool (spu_timing)
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annotates assembly file with scheduling and instruction
issue estimates
Dynamic analysis tool (CellBE system simulator)
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Can run your code on an X86 machine
Can collect a variety of statistics
Slide Source: Michael Perrone, MIT 6.189 Fall 2007 course
CISC 879 : Software Support for Multicore Architectures
Compiling with the SDK
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README_build_env.txt (You should IMPORTANT!)
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make.footer
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Specifies all of the build rules needed to properly build binaries
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Must be included in all SDK Makefiles (referenced relatively if
$CELL_TOP is not defined)
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Includes make.header
make.header
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Specifies definitions needed to process the Makefiles
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Includes make.env
make.env
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Provides details on the build environment features, including files,
structure and variables.
Specifies the default compilers and tools to be used by make
make.footer and make.header should not be modified
Slide Source: Cell Programming Workshop at GTech, Cell SDK 2.0
CISC 879 : Software Support for Multicore Architectures
Compiling with the SDK
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Defaults to gcc
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Set in make.env with three variables set to gcc or xlc
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PPU32_COMPILER
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PPU64_COMPILER
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PPU_COMPILER
[overrides PPU32_COMPILER and
PPU64_COMPILER]
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SPU_COMPILER
Can change from the command line
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PPU_COMPILER=xlc SPU_COMPILER=xlc make
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make -e PPU64_COMPILER:=gcc -e PPU32_COMPILER:=gcc
-e SPU_COMPILER:=gcc
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export PPU_COMPILER=xlc SPU_COMPILER=xlc ; make
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Slide Source: Cell Programming Workshop at GTech, Cell SDK 2.0
CISC 879 : Software Support for Multicore Architectures
Compiling with the SDK
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Use CELL_TOP or maintain relative directory structure
ifdef CELL_TOP
include $(CELL_TOP)/make.footer
else
include ../../../make.footer
endif
Slide Source: Cell Programming Workshop at GTech, Cell SDK 2.0
CISC 879 : Software Support for Multicore Architectures
Makefile variables
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DIRS
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PROGRAM_ppu
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PROGRAMS_ppu
32-bit PPU program (or list of programs) to build.
PROGRAM_ppu64 PROGRAMS_ppu64
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list of subdirectories to build first
64-bit PPU program (or list of programs) to build.
PROGRAM_spu
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PROGRAMS_spu
SPU program (or list of programs) to build.
If written as a standalone binary, can run without being
embedded in a PPU program.
Slide Source: Cell Programming Workshop at GTech, Cell SDK 2.0
CISC 879 : Software Support for Multicore Architectures
Makefile variables (cont’d)
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LIBRARY_embed LIBRARY_embed64
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CC_OPT_LEVEL
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Optimization level for compiler to use
CFLAGS, CFLAGS_gcc, CFLAGS_xlc
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Creates a linked library from an SPU program to be embedded
into a 32-bit or 64-bit PPU program.
Additional flags for compiler to use (general or specific to gcc/xlc)
TARGET_INSTALL_DIR
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Specifies where built targets are installed
Slide Source: Cell Programming Workshop at GTech, Cell SDK 2.0
CISC 879 : Software Support for Multicore Architectures
Sample Project
Slide Source: Cell Programming Workshop at GTech, Cell SDK 2.0
CISC 879 : Software Support for Multicore Architectures
Next Time
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Chapters 1-3
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And all of
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NVIDIA CUDA Programming Guide version 1.1
Chapter 29 from GPU Gems 2
Links on website
CISC 879 : Software Support for Multicore Architectures