Fabrication of Micromachined Microwave Couplers by CMOS

Download Report

Transcript Fabrication of Micromachined Microwave Couplers by CMOS

SiGe Strained-Layer Epitaxy









SiGe Alloys
Pseudomorphic Growth and Film Relaxation
Putting Strained SiGe into SiGe HBTs
The challenge of SiGe Epitaxy
SiGe Growth
Surface Preparation
Growth Techniques
Stability Constrains
Theory
Project Title
SiGe Alloys
 Si and Ge
 Group Ⅳ elemental semiconductors
 Diamond lattice structure
 Vegard’s rule
 a(Si1-XGeX)=aSi+x(a Ge-a Si)
 a :lattice constant
 x:Ge fraction
 Diffraction measurement
 a(Si1-XGeX)=0.002733x2+0.01992x+0.5431
Project Title
SiGe Alloys
Unit cell of the diamond lattice
Project Title
Theoretical and experimental lattice constant of a
Si1-xGex alloy as a function of Ge fraction
Pseudomorphic Growth and Film Relaxation
 Lattice mismatch between Si (a=5.431A) and Ge (a=5.658A)
 4.17 % at 300K
 SiGe film on thick Si substrate
 Initial growth
 Pseudomorphic
 SiGe film is forced to adopt Si smaller lattice constant
 Desired result for most device application
 Reach “critical thithiness”
 Relax
 Stain energy too large to maintain local equilibrium
 SiGe film relaxes via misfit dislocation formation
 Defected film unsuitable for high-yielding device applications
 Generation/recombination trapping center
 High diffusivity pipes for dopants
Project Title
Pseudomorphic Growth and Film Relaxation
Schematic 2-D representation of both
strained and relaxed SiGe on a Si substrate
Project Title
Schematic representation of misfit dislocation
formed at the Si/SiGe growth interface
Pseudomorphic Growth and Film Relaxation
 Metastable
 Film remain pseudomorphic ,may have exceeded the critical thickness
 Will relax during subsequent thermal processing step that add energy to the
system
Plan-view TEM (top down image) of
an unstable SiGe film that has been annealed
and undergone relaxation. The visible linear
structures are misfit dislocation
Project Title
Putting Strained SiGe into SiGe HBTs
 Three-layer composite structure
 A thin,undoped Si buffer layer
 The actual boron-doped SiGe active layer
 A thin,undoped Si cap layer
Schematic epitaxial SiGe film for use in
a SiGe HBT. The film consists of a thin
Si buffer layer, the compositionally graded
SiGe layer of thickness(h), and a Si cap
layer of thickness(H).The boron base
doping is contained within the SiGe layer.
Project Title
Putting Strained SiGe into SiGe HBTs
Cross sectional TEM showing the active device region of a fabricated SiGe HBT.
The (table) strained SiGe base layer has a peak Ge content of 10% and is defect free,
and cannot be delineated from the Si matrix
Project Title
Putting Strained SiGe into SiGe HBTs
 Thin Si buffer layer
 Help ensure pristine SiGe epitaxial growth interface is preserved between the
original Si substrate
 High-temperature Si epitaxy process,coming SiGe strained layer by difficult lowtemperature epitaxy process
 Device design
 Allow the incorporation of intrinsic layers (i-layers)to be easily embedded in the
collector-base junction
 Decrease the junction field and aid in breakdown voltage tailoring
Project Title
Putting Strained SiGe into SiGe HBTs
 Active SiGe layer
 Thickness h,position-varying Ge composition
 Embedded boron doping spike,10nm by 2~4×1019cm-3,for an integrated
base charge of roughly 2~4×1019cm-2
 Form the active region of the band-engineered device
 The specific shape,thickness,placement of the Ge profile with respect to
the boron base profile determine the resultant performance of the transistor
Project Title
Putting Strained SiGe into SiGe HBTs
 Si cap layer
 Thickness H
 Provide a Si termination to the SiGe composite
 Most SiGe HBT fabrication involve oxidation step to form the emitter-base spacer used in
self-alignment,and SiGe does not oxidize
 Provide additional space to allow the modest out-diffusion of the boron base
profile ,provide room for the emmitter out-diffusion
 As with Si buffer layer
 introduce an active i-layer into the emitter-base junction to lower the junction electric
field
 Thereby reduce the parasitic EB tunneling current
 Help improve the overall stability of the film
Project Title
The challenge of SiGe Epitaxy
 Si epitaxy in device fabrication enable one to overcome the
fundamental limitations by ion implantation
 Implantation energy-dependent Gaaussian distribution of dopants as a
function of depth
 Ion channeling of the implanted dopant species
 The need for high temperature annealing to remove implant damage and
activate the dopants
 Both cleaning and growth temperatures for conventional Si epitaxy
are in the range of 1,000℃
 At such temperatures,any advantage obtained from precise device layer
formation by epitaxy is lost in the subsequent diffusion of dopants away from
their intended locations
 The key to the successful use of Si(or SiGe)epitaxy to make
advanced devices is thus to affect high-quality film growth at very
low temperature (<600℃)
Project Title
Surface Preparation
 Two distinct phases
 Initial growth interface
 Film growth
 Consider the means of growth surface preparation
 Must identify the nature of the surface
 In classical high temperature Si epitaxy
 Surface being prepared was that of an unpatterned,bulk-grown Si wafer
 If patterned and implanted regions were present during the thermal cycles
employed in classical Si epitaxy
 Where temperatures in excess of 1,000℃ for 10 minutes are typical
Project Title
Growth Techniques
 Passivate a Si surface with hydrogen
 A 10~15 seconds etch in a dilute 10:1 H2O/HF solution.the hydrogen
adlayer create
 Reduce the reactivity of the growth interface approximately 13 orders of
magnitude from that of a bare Si surface with respect to its oxidation rate in
ambient air
 Boron dose in excess of 1010 cm-2 at the initial growth interface,
even in the UHV conditions employed in MBE
 Reduce the magnitude and impact of this contamination
 Deposition of a buffer layer of material to bury the contamination well below the active
device region
 Depositing layers on patterned substrate,this is not a viable approach
Project Title
Growth Techniques
 High temperature for conventional Si epitaxy
 Provide for adatom mobility
 Suppress the inclusion of undesirable dopant species in the films being
deposited
 Achieve adequate film purity during low temperature epitaxy
 Best known are the UHV techniques associated with MBE,vacuum range
10-11 torr
 To reduce the complexity and expense
 Chemically selective form of the UHV technique
 Simplified UHV technique
 Employ O-ring seals and quarts reaction tube
 “soft” levels of UHV,range of 10-9 torr
 The preponderance of residual gas is hydrogen
 Oxygen and water levels are reduced to the range of 10-11 rorr partial pressure
 Carbon-bearing species are not detectable owing to the use of turbo-molecular
pumping
Project Title
Stability Constrains
 “critical thickness” (hcrit)
 The maximum thickness for obtaining pseudomorphic growth post-fabricatiom
 “energy minimization”
SiGe strained-layer thermodynamics
stability diagram comparing UHV/CVD
Experimental data to Matthews and
Blakeslee’s theoretical result
Project Title