Introduction to VLSI Algorithms Fall 2001
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Transcript Introduction to VLSI Algorithms Fall 2001
MCS-51 Microcontroller
•The MCS-51 is an 8 bit microcontroller originally developed by
Intel in 1980.
•It is the world's most popular 8-bit microcontroller core, made by
many independent manufacturers (truly multi-sourced).
•There were 126 million 8x51s (and variants) shipped in 1993!!
•A typical 8x51 contains:
•- CPU with boolean processor
•- 5 or 6 interrupts: 2 are external, 2 priority levels
•- 2 or 3 16-bit timer/counters
•- programmable full-duplex serial port (baud rate provided by
one of the timers)
•- 32 I/O lines (four 8-bit ports)
•- RAM
•- ROM/EPROM in some models
Hardware Summary of 8x51
The 8x51 is the original member of the MCS-51
family, and is the core for all MCS-51 devices.
The features of the 8x51 core are
– 8-bit CPU optimized for control applications
– Extensive Boolean processing (Single-bit logic)
capabilities
– 64K Program Memory address space
– 64K Data Memory address space
– 4K bytes of on-chip Program Memory
– 128 bytes of on-chip Data RAM
Hardware Summary of 8x51
– 32 bi-directional and individually addressable
I/O lines
– Two 16-bit timer/counters
– Full duplex UART
– 6-source/5-vector interrupt structure with two
priority levels
– On-chip clock oscillator
Comparison of MCS-51 Family
Part
Number
On-Chip Code
Memory
On-Chip Data
Memory
Timers
8051
4K MASK ROM
128 bytes
2
8031
NO ROM
128 bytes
2
8751
4K EPROM
128 bytes
2
8951
4K FLASH
128 bytes
2
892051 2K FLASH
128 bytes
2
256 bytes
3
8952
8K FLASH
8x51 Block Diagram
EXTERNAL
INTERRURTS
INTERRURT
CONTROL
(8052 )
4K
ROM
128
RAM
TIMER 2
4K
ROM
128
RAM
TIMER 1
TIMER 0
4 I/0 PORTS
SERIAL
PORT
CPU
OSC
BUS
CONTROL
12MHz
RD
WR
TXD RXD
P0 P2 P1 P3
(8052 )
8x51 Pin Diagram (DIP)
8x51 Pin Diagram (PLCC)
Memory Organization
Separate memory space for program (64KB)
and data (64KB).
Internal memory:
– On-chip ROM (4K/8K for 51/52)
– On-chip RAM (128/256 for 31,51/32,52):
General purpose storage
Bit-addressable storage
Register banks
Special function registers (SFR)
MCS-51 Memory Structure
8x51 Program Memory
EA=1
EA=0
8x51 Internal Data RAM
(8052)
Lower 128 Bytes of Internal RAM
20H-2FH: 128 Bit-addressable bits occupying bit address 00H-7FH.
30H-7FH: General purpose RAM (can be accessed through direct or
indirect addressing)