Transcript PowerPoint Template

SIGCOMM PRESTO Workshop 2008
NetFPGA: Reusable Router Architecture for
Experimental Research
Jad Naous, Glen Gibb, Sara Bolouki, and Nick McKeown
@stanford.edu
2008. 09. 24
Presented by Jaeryong Hwang
Introduction
 Software & hardware re-use
What is the open-source
re-usable hardware?
vs
Field Programmable
Gate Array
 Obstacles of re-using hardware


Dependencies of the particular design
No underlying unifying operating system
Need to make FPGA based hardware design
more re-usable for network researchers
What is NetFPGA?
Networking
Software
running on a
standard PC
CPU
Memory
PCI
A hardware
accelerator
built with FPGA
driving Gigabit
network links
PC with NetFPGA
1GE
FPGA
1GE
1GE
Memory
1GE
NetFPGA Board
Who, How, Why
 Who uses the NetFPGA?



Teachers
Students
Researchers
 How do they use the NetFPGA?


To run the Router Kit
To build modular reference designs

IPv4 router

4-port NIC

Ethernet switch, …
 Why do they use the NetFPGA?


To measure performance of Internet systems
To prototype new networking systems
Outline
NetFPGA Components
Pipeline Interface Details
Usage Example: IPv4 Router
NetFPGA Components
CPU
Verilog
EDA Tools
(Xilinx,
Mentor, etc.)
Memory
PCI
NetFPGA Driver
1GE
FPGA
1GE
1GE
Memory
1GE
L3
Parse
L2
Parse
IP
Lookup
My
Block
1. Design
2. Simulate
1GE
3.In Synthesize
Q
4. Download
Mgmt
1GE
Out Q
Mgmt
1GE
1GE
Verilog modules interconnected by FIFO interfaces
NetFPGA System
CAD
Tools
Monitor
Software
Web &
Video
Server
Browser
& Video
Client
User Space
Linux Kernel
Packet Forwarding Table
PCI
PCI-e
VI
VI
VI
VI
NIC
NetFPGA Router
Hardware
GE
GE
GE
GE
GE
GE
(nf2c0 .. 3)
(eth1 .. 2)
Example of NetFPGA System
NetFPGA
NetFPGA
NetFPGA
Video
Client
Video Server
Usage Examples
IPv4 Router
Reference router pipeline

Five stages
 Input
 Input arbitration
 Routing decision and packet modification
 Output queuing
 Output
Packet-based
module interface
Pluggable design
Usage Examples/IPv4 Router
Inter-Module Communication
Using “Module Headers”:
Ctrl Word
(8 bits)
Data Word
(64 bits)
x
Module Hdr
…
…
y
Last Module Hdr
0
Eth Hdr
0
IP Hdr
0
…
0x10
Last word of packet
Contain information
such as packet length,
input port, output
port, …
Usage Examples/IPv4 Router
Inter-Module Communication
data
ctrl
wr
rdy
Usage Examples/IPv4 Router
MAC Rx Queue
Usage Examples/IPv4 Router
Rx Queue
0xff
0
0
0
Pkt length,
input port = 0
Eth Hdr:
Dst MAC = port 0,
Ethertype = IP
IP Hdr:
IP Dst: 192.168.2.3,
TTL: 64, Csum:0x3ab4
Data
Usage Examples/IPv4 Router
Input Arbiter
Pkt
Pkt
Pkt
Usage Examples/IPv4 Router
Output Port Lookup
Usage Examples/IPv4 Router
Output Port Lookup
5- Add output
port header
1- Check input
port matches
Dst MAC
2- Check TTL,
checksum
3- Lookup next
hop IP & output
port (LPM)
0xff
0
0
4- Lookup next
hop MAC
address (ARP)
0
Pkt length,
input port = 0
output port = 4
EthHdr:
MAC
=0
EthHdr:
Dst Dst
MAC
= nextHop
Src
MAC
= x, 4,
Src
MAC
= port
Ethertype = IP
IP Hdr:
IP Dst: 192.168.2.3,
TTL: 64,
63, Csum:0x3ab4
Csum:0x3ac2
Data
6- Modify MAC
Dst and Src
addresses
7-Decrement
TTL and update
checksum
Usage Examples/IPv4 Router
Output Queues
OQ0
OQ4
OQ7
Usage Examples/IPv4 Router
MAC Tx Queue
Usage Examples/IPv4 Router
MAC Tx Queue
Pkt length,
input port = 0
0xff
output port = 4
EthHdr: Dst MAC = nextHop
0
Src MAC = port 4,
Ethertype = IP
IP Hdr:
0
IP Dst: 192.168.2.3,
TTL: 64,
63, Csum:0x3ab4
Csum:0x3ac2
0
Data
Networked FPGAs in Research
1. Managed flow-table switch
•
http://OpenFlowSwitch.org/
•
Reduce buffer size & measure buffer occupancy
2. Buffer Sizing
3. RCP: Congestion Control
•
•
New module for parsing and overwriting new
packet
New software to calculate explicit rates
4. Deep Packet Inspection (FPX)
•
TCP/IP Flow Reconstruction
Regular Expression Matching
Bloom Filters
•
Network Shunt
•
Synchronization among Routers
•
•
5. Packet Monitoring (ICSI)
6. Precise Time Protocol (PTP)
Visit http://NetFPGA.org
NetFPGA Worldwide Tutorial Series
SIGCOMM:
Seattle,
Washington
Jiaotong Univ.
Beijing, China
Eurosys:
Glasgow,
Scotland
Cambridge:
England
Hot Interconnects
& Summer Camp
Stanford,
California
SIGMETRICS
San Diego,
California
CESNET
Brno,
Czech Republic
IISc
Bangalore,
India
NICTA/UNSW:
Sydney,
Australia
Photos from NetFPGA Tutorials
SIGCOMM - Seattle, Washington, USA
Beijing, China
SIGMETRICS - San Diego, California, USA
EuroSys - Glasgow, Scotland, U.K.
Bangalore, India
http://netfpga.org/pastevents.php and http://netfpga.org/upcomingevents.php
Map of Deployed Hardware
(July 2008)
Project Ideas for the NetFPGA













IPv6 Router (in high demand)
TCP Traffic Generator
Valiant Load Balancing
Graphical User Interface (like CLACK)
MAC-in-MAC Encapsulation
Encryption / Decryption modules
RCP Transport Protocol
Packet Filtering ( Firewall, IDS, IDP )
TCP Offload Engine
DRAM Packet Queues
8-Port Switch using SATA Bridge
Build our own MAC (from source, rather than core)
Use XML for Register Definitions
http://netfpga.org/netfpgawiki/index.php/Module_Wishlist
Conclusion
 Introduce open-source re-usable NetFPGA
 Providing a simple interface b/w hardware stages
and an easy way to interact with the software
 Allows developers to mix and match functionality
provided by different modules
References
 http://NetFPGA.org
 "NetFPGA: Reusable Router Architecture for
Experimental Research“ Jad Naous, Glen Gibb,
Sara Bolouki, and Nick McKeown SIGCOMM
PRESTO Workshop, Seattle, WA, August 2008
 NetFPGA Tutorial slides