Slajd 1 - Akademia Morska w Gdyni

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Transcript Slajd 1 - Akademia Morska w Gdyni

PA
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FM
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ARINE
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N IC
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The nonlinear compact
thermal model of power
MOS transistors
Krzysztof Górecki and Janusz Zarębski
Department of Marine Electronics
Gdynia Maritime University, POLAND
T
S
Outline
 Introduction
 The thermal model form
 Estimation of the model parameters
 Verification of the model accuracy
 Conclusions
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Introduction
 Three phenomena responsible for abstraction of the heat dissipated in
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•
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semiconductor devices: conduction, convection and radiation
The efficiency of these mechanisms depend on the device inner
temperature Tj, the case temperature TC and the ambient temperature Ta.
In modeling of the device cooling the compact thermal model is used.
The compact thermal models describe the difference Tj - Ta as a function
of the thermal power pth dissipated in the device. In this model the
transient thermal impedance Z(t) or the thermal resistance Rth of the
device exists.
The network representations of the device thermal model:
a)
R1
R2
Tj
pth
b)
Foster Rn
Tj
Cauer R'1
R'2
R'n Ta
Ta
pth
C1
C2
Cn
Ta
C'1
C'2
C'n
Ta
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Introduction (cont.)
• Both the network are fully equivalent from the point
of view of the terminal Tj, but
– the Foster network has no direct physical interpretation,
– the Cauer network results directly from dyscretization of
the one-dimensional heat transfer equation.
• The compact thermal models presented in the
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literature are linear models - influence of the device
inner temperature on the efficiency of the heat
abstraction is not included in these models.
From measurements Z(t) = f(pth) and Rth = f(pth)
The nonlinear thermal model is needed.
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The model form
• The network form of the nonlinear compact thermal model
pth
eRN
eR2
eR1
Tj-Ta
...
.
iC1
iC2
iCi  Ci 
dui
dt
eRi  Ri  iRi
iCN
• In order to obtain the nonlinear compact thermal model, five following
stages have to be performed:
1. the device Z(t) in the wide range of pth should be measured.
2. the values of the elements Ri,Ci (Cauer network) are estimated with the use
of the algorithm ESTYM at various values of the power.
3. the dependence Ri(pth) and Ci(pth) are drafted. Then, on the basis of these
dependences, the proper approximation function is fitted.
4. the values of the parameters existing in the dependences Ci(pth) and Ri(pth)
are estimated.
5. the proper model of the network form is formulated and implemented to
SPICE.
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Estimation of the model parameters
• The described algorithm is illustrated on the example of the
uncapsulated transistor MTD20N06V operating without any heatsink at Ta = 20oC.
• The courses of Z(t) at pth in the range from 0.05 W to 1.2 W are
measured. The measured Tj has values from 28oC to 150oC.
• The dependences Ri(pth) and Ci(pth) are obtained with the use of the
algorithm ESTYM.
b)
120
R3
Ri [K/W]
100
10
uDS = 8,5 V
uDS = 8,5 V
C5
C4
1
C3
80
Ci [J/K]
a)
60
R4
40
0,1
C2
0,01
C1
20
0,001
R5
R2
R1
0
0
0,2
0,4
0,6
0,8
pth [W]
1
1,2
1,4
0,0001
0
0,2
0,4
0,6
0,8
1
1,2
1,4
pth [W]
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Estimation of the model parameters
• the following description of the dependence Ci(pth) and Ri(pth) is
proposed

 p  pi1 
 p  pi 2 
  a i 2  exp  th

Ci  Ci 0  1  a i1 .  exp  th
b
b
i1
i2






 p  pi 3 
 p  pi 4 
  d i 2  exp  th

Ri  Ri 0  1  d i1 .  exp  th
e
e
i1
i2





where Ci0, ai1, ai2, bi1, bi2, di1, di2, ei1, ei2, Ri0, pi1, pi2, pi3, pi4 are the
model parameters of the values
i
Ci0
ai1
ai2
bi1
bi2
Ri0
di1
di2
ei1
ei2
pi1
pi2
pi3
pi4
1
0.005
-0.4
-0.6
0.3
3
1
-0.7
0.4
0.2
0.7
0
0
0.2
0.9
2
0.06
-1
0.8
0.2
0.8
5.3
-0.8
0.4
0.35
0.7
0.15
0
0.2
0.9
3
0.05
1.7
0.6
0.25
-1.8
24.3
1
2.3
0.4
5
0
0
0
0
4
0.5
1.2
0.6
0.25
-1.7
10
3.4
0.9
0.4
6
0
0
0
0
5
3
8.3
-2.3
0.3
0.4
19
-0.2
-0.4
0.5
4
0
0.5
0
0
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Verification of the model accuracy
180
160
p = 77,4 mW
p = 0,393 W
p = 0,592 W
120
100
p = 1,13 W
80
60
40
20
0
0,0001
0,001
0,01
0,1
1
10
100
1000
t [s]
160
140
pth (t )  P0  Pm  sin2    f 
P0 = Pm = 0.5 W
f = 0.01 Hz
120
Tj [oC]
Z(t) [K/W]
140
MTD20N06V uncapsulated
without any heat-sink
100
80
60
40
Nonlinear thermal model
Linear thermal model for high power
Linear thermal model for small power
MTD20N06Vuncapsulated
without any heat-sink
20
0
0
200
400
600
800
1000
t [s]
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Verification of the model accuracy
(cont.)
a)
b)
160
140
uncapsulated transistor
nieobudowany
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uncapsualted transistor
10
Rth [K/W]
120
Rth [K/W]
14
100
80
capsulated transistor
60
8
6
capsulated transistor
4
40
MTD20N06V without
any heat-sink
20
2
MTD20N06V on heat-sink
0
0
0
0,5
1
1,5
2
2,5
0
2
4
6
8
10
12
14
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pth [W]
pth [W]

 p 
 p 
Rth  Rth max  a1  exp  th   a 2  exp  th 
 b1 
 b2 

parameters
Rthmax
a1
a2
b1
b2
Transistor
uncapsulated without
heat-sink
170
0,45
0,55
0,08
26
Transistor
capsulated
without heat-sink
120
0,2
0,8
0,1
15
Transistor
uncapsulated with
heat-sink
13
0,1
0,9
0,08
50
Transistor
capsulated with
heat-sink
7
0,05
0,95
3
170
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Conclusions
• In the paper the compact nonlinear thermal model of a
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semiconductor device is proposed.
The accuracy of this model is verified on the example of the power
MOS transistor MTD20N06V.
A good agreement between the measurements and the calculations
in the wide range of changes of the device dissipated power and for
various cooling conditions is achieved.
The examples show a strong influence of the power dissipated in
the device on the values of its thermal parameters – the thermal
resistance and the transient thermal impedance.
For the device operating without a heat-sink, the changes of
thermal resistance corresponding to the considered changes of the
power equal to even 50% are observed. So, omitting nonlinearities
in the device thermal model can leads to serious errors in the
calculations of the device inner temperature.
The proposed nonlinear thermal model can be used in the
construction of the electrothermal model of the power MOS
transistors, dedicated to the analyze and design electronic circuits.
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Thank you for your attention
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