Transcript System Engineering Resource Needs and Analysis

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Das U-Boot:
Blackfin Guts
Agenda
Background
Boot ROM
U-Boot
Beyond
http://blackfin.uclinux.org/
Terms
Loader
Program that loads another, more complex, program
Boot ROM
The Blackfin on-chip ROM
Bootloader / Bootstrap Loader
Program that boots the “first program” such as the Linux kernel
Bare Metal
Stand alone program that runs directly on the processor
No operating system
http://blackfin.uclinux.org/
Das U-Boot
The "Universal Bootloader" is open source firmware
Started in October of 1999 by Dan Malek, supported by Wolfgang
Denk (Denx Engineering) as of July 2000
Free Software - full source code under GPL
http://www.denx.de/wiki/U-Boot
Production quality code base
Used as default boot loader by several board vendors
Portable across processors
and easy to port and to debug
Many supported architectures: ARM, Blackfin, m68k, Microblaze,
MIPS, NIOS, PowerPC, SuperH, x86, and more
More than 260 boards supported by public source tree
~20 Blackfin boards
http://blackfin.uclinux.org/
Boot ROM
Power on
Check BMODE pins
Check OTP (if available)
Setup selected boot source
Load and process LDR found at boot source
Load & execute init block
Load blocks (code & data)
Initialize filled blocks
Pass execution off to LDR
U-Boot is a standard LDR
Boot ROM boot modes tested every release:
Parallel Flash (bypass & LDR)
SPI Serial Flash
UART
NAND
http://blackfin.uclinux.org/
U-Boot LDR Layout
Example U-Boot LDR for BF548-EZKIT
Block 1 0x00000000: 0xAD6D5006 0xFFA00000 0x00000000 0x00034288 ( 16bit-dma-from-16bit ignore first )
Block 2 0x00000010: 0xADAB0806 0xFFA00000 0x00000174 0xDEADBEEF ( 16bit-dma-from-16bit init )
Block 3 0x00000194: 0xAD200006 0x03F80000 0x00001E4C 0xDEADBEEF ( 16bit-dma-from-16bit )
Block 4 0x00001FF0: 0xAD711006 0x00000000 0x00002000 0xBAADF00D ( 16bit-dma-from-16bit ignore )
Block 5 0x00004000: 0xAD110006 0x03F81E4C 0x00030230 0xDEADBEEF ( 16bit-dma-from-16bit )
Block 6 0x00034240: 0xADFE0006 0xFFA00000 0x00000028 0xDEADBEEF ( 16bit-dma-from-16bit )
Block 7 0x00034278: 0xAD470106 0x03FB20A4 0x0002D340 0x00000000 ( 16bit-dma-from-16bit fill final )
Block 2 – initialize block (“initcode”)
Block 3/5 – code (.text/.data sections)
Block 4 – embedded U-Boot environment
Block 6 – L1 code (.l1.text)
Block 7 – uninitialized data (.bss sections)
http://blackfin.uclinux.org/
LDR initcode block
Enable self refresh if external memory is enabled
Suspend to RAM
Loading another U-Boot in external memory (debugging / testing)
Program clocks
Use bfrom_SysControl() if available
Otherwise do standard PLL reprogram sequence
SIC_IWR, PLL_LOCKCNT, VR_CTL, PLL_DIV, PLL_CTL, SIC_IWR
Program memory controller
Disable self refresh if needed
Check for Suspend to RAM resumption
Program EBIU Asynchronous Memory Interface
Set EVT1 to U-Boot entry point
http://blackfin.uclinux.org/
Suspend to RAM
Handled in LDR init block
Check hibernate state in VR_CTL (if supported)
Look for magic at address 0x00000000
0xDEADBEEF
Load resume address from 0x00000004
Load stack address from 0x00000008
Jump to hibernation resume point
Linux restores itself from hibernate
Restore on-chip memory from external memory
Restore peripheral state
Etc...
http://blackfin.uclinux.org/
U-Boot Initialization
Setup stack pointer
Program SYSCFG
Enable cycles
Enable nested interrupts
Initialize C runtime ABI
Zero out loop / circular buffer / etc... registers
Zero out BSS if not done by Boot ROM
Lower execution to EVT15
Enable nested interrupts
Setup exceptions, CPLBs, and cache
Initialize CEC
Initialize environment from its storage
Boot up main program based on environment settings
Linux kernel
Bare metal application
http://blackfin.uclinux.org/
U-Boot hardware use
No interrupts are used
No exceptions are used
Except for CPLB miss to allow caching
All CPLB misses are handled dynamically – no hard coded lists per
processor that fall out of date or need board tweaking
Only peripherals that are explicitly needed are initialized
If booting from parallel flash, then initialize it
If booting over network, then initialize MAC
If booting over IDE, then initialize ATAPI
Etc...
Everything runs in poll mode
No interrupts!
Everything runs serially in a single thread
http://blackfin.uclinux.org/
Booting user program
Most common behavior is to boot the Linux kernel
U-Boot works with “bootable U-Boot images”
“uImage” is often the short name
Contains flat binary image of program
Includes CRC checking
Arbitrary load & entry addresses
Includes compression (gzip, bzip, lzma)
Select boot source
Flash: parallel, SPI, NAND, …
Mass Storage: CF, USB, IDE, SATA, MMC, SD, …
Dynamic: Ethernet, Wireless, Serial, …
Load uImage over source
Check CRC
Decompress
Jump to entry point
http://blackfin.uclinux.org/
Booting user program (cont)
U-Boot and program need not be in same storage
Boot ROM boots U-Boot out of parallel flash, but U-Boot boots Linux
off of SD card
Linux and root file system need not be in same storage
U-Boot boots Linux off of SD card, but Linux uses root file system in
NAND flash
Every file system format you can think of is supported
FAT 12 / 16 / 32
JFFS / JFFS2
YAFFS / YAFFS2
ISO9660 (CDROM)
Bad blocks with NAND
Behavior is all controlled dynamically through U-Boot console
http://blackfin.uclinux.org/
Board porting made easy
Porting to your own board is trivial
Lines of specific C code (including comments / whitespace)
BF518F-EZBRD – 219 lines
BF526-EZBRD – 284 lines
BF527-EZKIT – 217 lines
BF537-MINOTAUR – 244 lines
BF537-SRV1 – 244 lines
BF538F-EZKIT – 153 lines
CM-BF561 – 125 lines
Board specific code self contained
include/configs/<board>.h – configuration settings
boards/<board>/ – all board code
Drivers provided for all major peripherals
Customers encouraged to merge with our public tree
Automatically updated to latest versions and compile tested
http://docs.blackfin.uclinux.org/doku.php?id=bootloaders:u-boot:porting
http://blackfin.uclinux.org/
Debugging
All debug options are configurable
Completely disable for production if you wish
“Early Serial Output”
Get status messages over UART at every step (including initcode)
Verbose CPU crash messages
Automatic decoding of core registers
SEQSTAT – hwerror & excause
IPEND – pending interrupts
Automatic trace buffer
Decode the hardware trace buffer source / destination
Automatic symbol resolution
All addresses are decoded to symbol names + offsets
Signal JTAG automatically upon crash
http://blackfin.uclinux.org/
Questions ?
http://blackfin.uclinux.org/