Transcript Document

Preliminary Design Review
NASA Wireless Smart Plug (NWSP)
Experimental Control Logic Labs
October 29th, 2012
PDR Agenda
1. Update of documents developed and baselined since SDR
2. Matured Concept of Operations
3. Updates to Engineering Specialty Plans
4.Top-level Requirements and Flowdown to the next level of requirements since SDR
5. Review Design-to Specifications (hardware and software) and Drawings, Verification and
Validation plans, and Interface documents at lower levels; CAD model for all physical
components of the system
6.Trade Studies that have been preformed since SDR and their results
7.Engineering Development Tests and Results
8.Select a baseline design solution
9.Review and discuss internal and external interface design solutions (and any interface control
documents needed). This includes interface information provided by NASA since SDR
10.Review system operations
11.Design Analyses and Results
12.Risk Management Plan
13.Cost and Schedule data
2
Update of Documents Developed
and Baselined
 System Architecture
 Lower level details provided to depict the use of NASA requested
components based on the X-Hab Solicitation
 Functional Block Diagram
 Fuses in primary 28V-DC and 120V-DC load lines have been
removed after NASA requirement’s were clarified that the NWSP
is not to operate as a safety device
 Nivis ISA100.11a Release Version
 Habitat Demonstration Unit (HDU) gateway currently running
release 2.6.39
 HDU VN210 firmware currently running version 4.3.14
(Upg_VN210_FullAPI_SpeedupSPI_ExtWakeup_v04_03_14)
3
Matured System Architecture
NASA Wireless
Smart Plug
120V-DC
and/or
28V-DC
120V-DC
or
28V-DC
End Device
Nivis VersaNode 210
1 sample/second
ISA100.11a
IEEE 802.15.4
Nivis VersaRouter 900
DSH
Network
Master Control Unit
Windows OS
LabVIEW GUI
4
Matured Concept of Operations
• NASA Wireless Smart Plug (NWSP) is a proof-of-concept
prototype
• Installed in the Deep Space Habitat (DSH) mock-up for
testing and evaluation purposes only (not space qualified)
• Used to monitor and control power usage of DSH and its
installed equipment
• Monitor current draw from end device, and define actions
based on measurement (i.e. wireless communication,
manual disconnect, load shedding).
5
Updates to Engineering Specialty
Plans
 Nivis Equipment that was supplied by NASA on
October 26th:
 PCB with MSP430 and Nivis 210 Radio
 Nivis VersaRouter 900
 Nivis equipment to be supplied by NASA:
 Embedded software for MSP430 and Nivis 210 Radio
6
Top-Level Requirements
 Power Control
 Support for 120V/28V DC
 Near real-time monitoring
 Fail safe
 Windows based master control unit
 Communications
 Wireless configuration, control, monitoring and reporting
 Data rate: 1 sample/second
 Use a Nivis VN210 radio
 Support a Nivis VR900 router Standards: SPI, ISA 100.11a
 Form Factor & Fit
 Small form factor
 Cannon-type connector
 Integration with DSH
 Deliver five NWSP units for evaluation
7
Requirements Flow Down 1/3
8
Power Control
Voltages
Monitor
Fail Safe
Threshold
GUI
28VDC
0 to 5A
0 to 5A
Standalone
Executable
120VDC
3% Full Scale
0.1A Inc.
Windows OS
Alert
Requirements Flow Down 2/3
Communications
Data Rate
Equipment
Protocol
1 sample/s
Nivis VN210
ISA100.11a
IEEE 802.15.4
Alert Within 3s
Nivis VR900
SPI
9
Requirements Flow Down 3/3
Form Factor &
Fit
Size
Integration
3” x 3” x 3”
5 NWSP
Cannon-type
Connector
DSH Install
10
Design-to Specifications
 Voltage:
 Input: 28VDC and/or 120VDC
 Output: 28VDC or 120VDC
 Monitor Current: 5A, ± 3% of full scale
 Data Collection: 1 sample/second
 User Interface: Standalone application on Windows-based
MCU.
 Communication:
 Integrate into DSH wireless mesh with Nivis VR 900 gateway
 Radio: Nivis VN 210
 Standard: ISA100.11a
 Size: 3” x 3” x 3” target.
 Power Consumption: Minimal
 Deliverables: 5 NWSP units, installed on DSH mockup.
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CAD Model for Physical
Components
12
Trade Studies and Results:
Current Sensor
13
Device
Type
Pros
Cons
Cost
ACS714
Hall Effect


•
Requires offset, gain,
and low pass filter
$3.89


Small package
Negligible power
dissipation
Single 5V supply
40A Range



Electrical Isolation
15A Range
Small package


Bipolar 15V supply
Relatively expensive
$35.20




Power Dissipation
Heat
$20
Very small package
Non inductive, non
capacitive
No ringing
CMS2015
MagnetoResistive
Current Sensor
VCS1625
High Precision
Shunt Resistor

Trade Studies and Results:
120VDC to 28VDC Conversion
14
Device
Type
Pros
Cons
Cost
667-ERA8AHD300V
Voltage Divider
• Inexpensive
• Small package
• Power dissipation
• Heat
• Fluctuations in output
$2.53
MC33363B
High Voltage
Switching
Regulator
High Voltage Linear
Regulator
•
•
•
•
•
•
•
•
•
TL783
Small Package
Inexpensive
Negligible heat
Adjustable Vout
Noisy
$1.60
Large current draw of >1A
Requires 40V supply
Limited output current
$2.55
Significant waste heat
Trade Studies and Results:
Voltage Regulator
Device
Type
Pros
LM317L
Linear Voltage
Regulator
•
•
•
ADP111
Switching
Regulator
N/A?
Hybrid Regulator





Low output noise
Programmable output
Cheap
15
Cons
Cost


Inefficient
Heat
$.49

Relatively Expensive
$2.44


Larger space required
Relatively Expensive
N/A?
Efficient
Low Heat
Efficient
Low Heat
Low Noise
Trade Studies and Results:
Voltage Switch
16
Device
Type
Pros
Cons
Cost
Micropac
53238
Optocoupled
Power Mosfet
•
•
•
•
•
•
Heat
Power dissipation
Long lead time
Unknown
•
•
Mechanical
Power dissipation
$1.61
•
Large
$23.56
•
•
AV3712613
SH20DC20-16
Relay
High Power DC
Solid-State Relay
•
•
•
•
•
Small package
Operates up to 125V
Can handle 5A
continuous
Radiation tolerant
Can be controlled with
pin from MSP430
Can be controlled with
pin from MSP430
Inexpensive
Can handle up to 20A
continuous
Low control voltage of
3.5V
Can be controlled with
pin from MSP430
Trade Studies and Results:
Connector
17
Device
Manufacturer
Pros
Cons
Cost
HBL2513
Hubbell
• Not quarter turn
$73.44
Veam GRH
Cannon
• Not available locally
Unknown
PDS-222-4
Amphenol
• Operates up to 208V
• Can handle 20A
continuous
• Fits NASA requirement
• Available locally
• Locking
• Operates up to 250V
• Can handle 15A
continuous
• Quarter turn locking
• High shock and vibration
resistance
• Fits NASA requirement
• Operates up to 200V
• Can handle 10A
continuous
• Designed for space
operation
• Quarter turn locking
• No 5 pin layout available
• Not available locally
Unknown
Trade Studies and Results:
Microcontroller
18
Manufacturer
Microcontroller
Pros
Cons
Price per
Unit
Texas
Instruments
MSP430F5438A
• Large memory size of
256KB
• Low operating voltage
(1.8 ~ 3.6V)
• High cost
$11.73
Microchip
PIC24FJ128GA110 • Cost
Freescale
MC56F8257VLH
• Fast processing speed of
60MHz
• Less precise A/D convertor $4.76
of 10 bits
• No UART communication
$7.15
• Higher supply voltage
necessary
Engineering Development Tests:
Analog-to-Digital Converter
 12-bit ADC Internal to MSP430F5438A
 Internal Reference (2.5V)
 Sample-and-Hold
 14 External Channels
Offset
Gain
LPF
19
Baseline Design Solution:
Functional Block Diagram Overview
20
Functional Block Diagram:
Voltage Step Down and Regulation
21
Functional Block Diagram:
Current Sense and Disconnect
22
Functional Block Diagram:
Nivis VN210 SPI Interfacing
23
Internal and External Interface
Design Solutions: SPI
Serial Peripheral Interface Bus (SPI)
 Synchronous serial data link standard
 Full duplex mode
 Master/Slave mode where the master device initiates the data frame
 Multiple slave devices are allowed with individual slave select (chip
select) lines
 The SPI bus specifies four logic signals:




SCLK: serial clock (output from master)
MOSI: master output, slave input (output from master)
MISO: master input, slave output (output from slave)
SS: slave select (active low, output from master)
24
Internal and External Interface
Design Solutions: SPI
Advantages
• Full duplex communication
• Complete protocol flexibility for the bits transferred
• Typically lower power requirements due to less circuitry (including pull up resistors)
• Slaves use the master's clock, and don't need precision oscillators
• Slaves don't need a unique address — unlike I²C or GPIB or SCSI
• Transceivers are not needed
• Uses only four pins on IC packages, and wires in board layouts or connectors; fewer than parallel interfaces
• At most one unique bus signal per device (chip select); all others are shared
• Not limited to any maximum clock speed, enabling potentially high throughput
Disadvantages
• No in-band addressing; out-of-band chip select signals are required on shared buses
• No hardware flow control by the
• No hardware slave acknowledgment
• Supports only one master device
• No error-checking protocol is defined
• Generally prone to noise spikes causing faulty communication
• Only handles short distances compared to RS-232, RS-485, or CAN-bus
• SPI does not support hot plugging (dynamically adding nodes).
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System Operations:
Initialization
Connect NWSP
male input
receptacle to DSH
Run LabVIEW
GUI executable
Current
Threshold
Test connection
between NWSP
and GUI
Yes
Set end device
parameters
26
Priority
No
Established
Connection?
Mode
Request
parameters from
NWSP
configuration
No
Parameters
Set?
Yes
Connect end
device to NWSP
female output
receptacle
(A)
Reset physical
connection and
executable
System Operations:
Standard Operation
Close switch of
primary supply line
to allow end device
operation
(A)
27
NWSP measures
actual current and
voltage(s)
Actual
Current of
Primary
(E or F)
Compare actual
current against
configured
threshold current
Actual
Exceed
Threshold?
Yes
Send all measured
values to GUI
Voltage
Point 1
through 7
User
Request
Disconnect?
Send all measured
values to GUI
No
Yes
No
Send all measured
values to GUI
Prompt user to
disconnect
(B)
(C)
Manual
Mode?
Automatic
Disconnect
Primary supply line
from end device
Notify user of
disconnect
(D)
System Operations:
Disconnect and Reset
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(C)
Yes
User
Disconnect?
No
(E)
(D)
(B)
Disconnect
Primary supply line
from end device
Notify user of
disconnect
(F)
Prompt user to
reconnect
Wait for user to
manually reconnect
No
User
Reconnect?
Yes
Reconnect Device
(F)
GUI Updates - Detailed View
GUI Updates
Master Control Software Logic
Master Control Software Logic
Design Analyses:
Sampling and Decision Algorithm
 Process of averaging multiple samples for noise
compensation through statistical analysis:
 Defining the population of concern
 Specifying a sampling frame, a set of items or events possible to
measure
 Specifying a sampling method for selecting items or events from
the frame
 Determining the sample size
 Implementing the sampling plan
 Sampling and data collecting
 Factors





Nature and quality of the frame
Availability of auxiliary information about units on the frame
Accuracy requirements, and the need to measure accuracy
Whether detailed analysis of the sample is expected
Cost/operational concerns
33
Design Analyses:
Power Budget
Device
VersaNode210
MSP430F5438
ACS714 Current Sensor IC
SH20DC20-16
TL783
LM713L
34
Max Current Draw
60 mA
312 uA
13 mA
Risk Management Plan:
PMI Risk Management Process
• Identify
• Evaluate
• Develop Response
• Control
35
Risk Prioritization Matrix
Priority Total Overall
Risk
3
7
High
1. Project goes overschedule
9
1
Low
2. Injury or damage from 120V source
10
0
Low
3. Funding delayed
1
10
High
4. Delay in parts procurement.
2
8
High
5. Solving 120V/28V available power
problem
5
5
Medium
6. Limited financial resources
7
3
Low
7. Loss of a team member
8
2
Low
8. Unable to source proper 120V DC
4
6
Medium
9. Further revisions necessary
6
4
Medium 10. Selected solution found unfeasible
36
Comparison
1
2
12
33
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444
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99999999
123456789
101010101010101010
Risk Evaluation
HIGH
PROBABILITY
OF
OCCURRENCE
37
5
4
6,9
1
10
LOW
Legend
1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
Project over-schedule
Injury/damage from 120V
Funding delayed
Delay in parts
Solving 120V step-down
Limited financial resources
Loss of a team member
Unable to source 120V DC
Further revisions necessary
Selected solution found unfeasible
3
7
8
2
HIGH
LOW
SEVERITY OF IMPACT
Cost Data
38
NASA
$40,915
$3,000
Cost Sharing
• Labor
• Travel
• Equipment
$5,000 (TI)
• ODCs
$5,000
• Overhead/Indirect
$22,501 (TAMU)
_____________________________________________
Total Cost to Sponsor
$48,915
$27,501
Actual Project Value 76,416
Capstone Labor
 Total # of Boxes: 133
 Total # of Work Packages: 95
 Expected Number of Man Hours: 2259 Hours
 Research:
160 Hours
 Design:
363 Hours
 Simulation:
60 Hours
 Implementation:
370 Hours
 Testing:
260 Hours
 Documentation:
1046 Hours
 Close Out:
6 Hours
39
Gantt Chart
NWSP Gantt Chart
28-Aug-12
Research
Phase
Design
17-Oct-12
6-Dec-12
Duration
25-Jan-13
16-Mar-13
5-May-13
11/1/12
11/25/12
Simulation
4/17/13
Implementation
4/18/13
Testing
Documentation
Close-out
4/29/13
5/6/13
5/10/13
NASA Deliverables
Date
1/8/12
19/9/12
Activity
Kickoff Meeting
SDR
29/10/12
PDR
5/12/12
CDR
10/12/12
Weekly
13/2/13
Project Status Meetings
Progress Checkpoint #1
5/3/13
3/4/13
Final Design Review
Progress Checkpoint #2
15/5/13
20/5/13
Progress Checkpoint #3
Final Presentation
15/6/13
15/8/13
15/9/13
Integration with DSH
DSH Integrated Testing
Final Acceptance
Deliverable
Draft System Design Process (SDP)
Presentation
Power Point Slides
Video
Presentation
Power Point Slides
Video
Presentation
Power Point Slides
Video
Final SDP Report
Presentation and PPT Slides
Alpha Schematic
Alpha Board Layout
Software Hierarchical Charts
Test Matrix
Presentation and PPT Slides
Final Schematics
Final Board Layout
Software Flow Charts
Test Plan
Final Demonstration
Final Report
Five Smart Plugs
Field Test Plan
Field Test Report
41
Questions/Comments
42