Transcript Designing a TCP/IP Core for Power Consumption Analysis

Designing a TCP/IP Core
for Power Consumption Analysis
Kenichi Tanamachi, Koji Inoue, and Vasily G. Moshnyaga
Fukuoka University
2004/8/5
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Background

TCP/IP protocol designed by software

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Network bandwidth increasingly grows
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Low-speed TCP/IP packet processing
of termination nodes
Require low-power for mobile networkconnected computing devices

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Grow 1Gbps in near future
Bottleneck in high-speed network
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Major protocol for network data transactions
PDA, Cellular phone，・・・
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TCP/IP protocol stack
Transmit
Receive
Data
（HTTP,SMTP,POP3）
Data
TCPheader Data
Transport layer
(TCP,UDP)
Data
TCPheader
IPheader TCPheader Data
Network layer
（IP,ICMP）
Data
TCPheader IPheader
Data
TCPheader IPheader
Ethernet
IPheader TCPheader
header
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Application layer
Data
Data link layer
(Ethernet,PPP)
Internet
Ethernet
header
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Purpose
Implement TCP/IP packet processing by custom hardware
and analyze its power consumption

In order to analyze power consumption
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Step1 Decide TCP/IP Core organization
Step2 Design TCP/IP Core
Step3 Analyze the power consumption
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Design Flow
1.
Functional partition
－decide functional partition of TCP and IP
2.
HDL
－RTL design by using Verilog-HDL
3.
HDL
Logic synthesis
－use synopsys Design Compiler with 0.35μm
CMOS library
－output report file for area and power
consumption
4.
Layout
－use an auto P&R tool
－extract wire load capacitance
5.
Simulation
Library
Logic Synthesis
Report file
Analysis
Layout
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TCP Core
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Functional Partition
Application layer
TCP

port_ctr
data_ctr
window_ctr
checksum
IP layer
Data link layer
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port_ctr （BLOCK1）
 Transfer data to or from
application layer
data_ctr （BLOCK2）
 Divide and reconstruct data
by using sequence
numbers
 Error check by timer
window_ctr （BLOCK3）
 Congestion control by
inform transmit-side
receive-side’s empty buffer
size
checksum （BLOCK4）
 Check error of data and
header, and if have some
error, create the request of
retransmission
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Design Results
Area
Power
transmit receive transmit
Wire capacitance
receive
transmit
receive
BLOCK1
4%
6%
6%
4%
4%
3%
BLOCK2
27%
23%
23%
30%
22%
26%
BLOCK3
7%
10%
10%
7%
9%
6%
BLOCK4
62%
61%
61%
59%
65%
65%
Checksum in BLOCK4 requires a large number of transistors
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IP Core
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Functional Partition
Application layer

TCP layer
IP
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service_info
frag_ctr
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add_ctr
checksum
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Data link layer
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sevice_info （ｂlock1)
 Inform header
information( IPversion,
header length, packet
length, type of service)
frag_ctr (block2)
 Determine whether to
fragment or not data. If
yes, identify each data
add_ctr (block3)
 Determine source and
determination address
Checksum (block4)
 Check error in IP header
and compute time to live
for packet
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Design Results
block1
block2
Area
16%
29%
Power
14%
26%
block3
43%
47%
block4
12%
13%
Checksum in block3 requires a large number of transistors
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Discussion
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Which block gives a great impact on power?
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TCP Core
 Checksum(BLOCK4) More than 60% of all
IP Core
 Checksum(BLOCK3) More than 47% of all
Focus on these two blocks
to lower the power consumption of TCP/IP Core
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Comparison of TCP with IP
Area(μ㎡)
Power(mW)
TCP
transmit receive
3.774
3.332
18.8503 19.669
IP
2.1196
10.7182
×2
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The TCP Core includes more complex functions
than the IP Core
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