EddiCam - Observatoire de Paris
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Transcript EddiCam - Observatoire de Paris
PLATO Main Electronics Units (MEU)
based on inputs from P. Plasson and the system team
J. Miguel Mas-Hesse
Centro de Astrobiología (CSIC-INTA)
On-board data processing: Introduction
• DPS goal: automatically process and extract accurate
stellar light curves from the raw, messy CCD images.
Stellar field
PLATO Kick Off
November 2010
PLATO image
J. Miguel Mas-Hesse
2
On-board data processing: baseline concept
• The normal-telescopes onboard data processing system
will be formed by:
– 4 CCD + 1 FEE per focal plane (telescope)
• 32 telescopes
– 1 Data Processing Unit (DPU) per 2 focal planes
• 16 DPU boards
– 4 DPUs per 1 Main Electronics Unit (MEU)
• 4 MEU boxes
– 1 Instrument Control Unit (ICU) per 4 MEUs
• 1 ICU (+ 1 fully redundant ICU)
PLATO Kick Off
November 2010
J. Miguel Mas-Hesse
3
On-board data processing: architecture
1 N-DPU for
2 N-cameras
F-cameras
PLATO Kick Off
November 2010
J. Miguel Mas-Hesse
4
On-board data processing: architecture
Present MEU baseline concept:
+ 1 DPU per 2 focal planes
+ 1 single DPU PSU box, external
to the MEU’s
SpW
To ICU-M To ICU-R
PLATO Kick Off
November 2010
J. Miguel Mas-Hesse
5
PLATO MEU: FEE – DPU SpW link
• FEE – DPU link baseline:
– 2 SpaceWire links per FEE (100 Mbps)
SpW 100 Mbps
• Alternative:
– 1 SpaceWire link per FEE (200 Mbps)
• Feasibility has to be demonstrated.
PLATO Kick Off
November 2010
J. Miguel Mas-Hesse
6
On-board data processing: architecture
PLATO Kick Off
November 2010
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On-board data processing: architecture
PLATO Kick Off
November 2010
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PLATO MEU: operation
• Target count for 2 x 4 CCD per DPU (to be
processed every 25 sec.):
Nominal sample 2x(110.000 stars/telescope) = 220.000 stars/DPU
Extended sample (+50% margin)
= 330.000 stars/DPU
Background win.
Imagettes up to
Offset windows
Smearing rows
2 x 400
2 x 2.000
2 x 2 x 4 half-row (2.255 pixels)
2 x 4 x 10 overscan rows
Fullimage
Acquisition x 8
6.25
sec
2 images / 6.25 sec
6.25
sec
Window
Extraction
up to 330.000 stars / 25 sec
• Total memory requirement, including 50%
margin on star count:
250 Mbytes per DPU
Data correction
and LC extraction
6.25
sec
5400
Masks &
sec
window positions
updating
PLATO Kick Off
November 2010
J. Miguel Mas-Hesse
9
PLATO MEU: CPU load
• The CPU load has been estimated for various processors,
based on current baseline for number of stars + extraction
algorithms. At this phase the %CPU load should be ≤ 50%.
Weighted mask photometry
assumed
•
The present concept seems feasible, but:
– with 1 DPU/2 telescopes, no margin on star counts acceptable.
– with 1 DPU/telescope an extended sample with +50% margin in star
counts could be considered, if required. .
PLATO Kick Off
November 2010
J. Miguel Mas-Hesse
10
PLATO MEU: open points
MEU
4 Mpx/s
4510 px
4510 px
FEE #1
ADC
ADC
SpW
I/F
N-DPU #1
180 Mbps
(2 x 64 x 1.4)
4510 px
235 kbps
To redundant ICU
FEE #2
4510 px
SpW
ADC
ADC
4510 px
N-DPU #2
235 kbps
4510 px
FEE #3
ADC
ADC
4510 px
4510 px
SpW
I/F
SpW
I/F
N-DPU #3
FEE #4
ADC
ADC
SpW
I/F
To main ICU
Space
235 kbps Wire
Router
(R)
N-DPU #4
SpW
Space
Wire
Router
(M)
<1 Mbps
235 kbps
Backup concept:
Power
Distribution
+ 1 DPU board per telescope
+ 4 DPUs per MEU
+ 8 MEU
More powerful, but too heavy
PLATO Kick Off
November 2010
Cmd
HK
Test I/F - SpW
Power
Supply
(M + R)
28 V, Cmd from S/C
M+R
J. Miguel Mas-Hesse
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PLATO MEU: open points
Baseline
Alternative
2
1
MEU-PSU
1 MEU-PSU box for 4
MEU boxes
4 MEU-PSU inside each
MEU box
FEE / DPU number of
SpaceWire links
2 SpaceWire links per
FEE (100 Mbps)
1 SpaceWire links per FEE
(200 Mbps)
RMAP
DMA transfer tables
Boot Software in PROM
Pure RMAP hardware boot
Number of telescopes per
DPU
FEE DPU image
transfer mechanism and
protocol
DPU Boot mechanism
PLATO Kick Off
November 2010
J. Miguel Mas-Hesse
12
PLATO: next steps
• The industrial MEU definition study is starting now.
• Goals:
– Definition and dimensioning of the N-DPUs
• Global architecture, choice of processors, number of
SpaceWire data links, location of PSUs, mass, power
comsumption,…
• Trade off on algorithms potential increase of complexity
– Development of simulators/breadboards for critical
interfaces
• Spacewire link FEE – DPU
Final design within mass and power budgets, but
compliant with scientific requirements!
PLATO Kick Off
November 2010
J. Miguel Mas-Hesse
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