PRR QA/QC - International Muon Ionization Cooling Experiment

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Transcript PRR QA/QC - International Muon Ionization Cooling Experiment

DAQ for BTF
Jean-Sebastien Graulich, Geneva
o BTF Overview
o Hardware Overview
o DAQ Software Description
o What’s next
o Summary
MICE CM15 June 2006
Jean-Sébastien Graulich
Slide 1
BTF Overview
MICE CM15 June 2006
Jean-Sébastien Graulich
Slide 2
Hardware Overview

TOF
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Detector: A couple of slabs, mounted with R4998 Pmts
FEE Configurations
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MICE baseline
Constant Fraction Discriminator (either VME or NIM)
CAEN TDC V1290 (32 ch, 25 ps LSB)
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Comparison basis
Active Splitter (recuperated from HARP)
Constant Fraction Discriminator (either VME or NIM)
CAEN TDC V1290 (32 ch, 25 ps LSB)
CAEN QDC V792 (32 ch, 100 fC LSB)
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SIS 3320 200 MHz Flash ADC
Time over Threshold Discriminator (NINO)
EmCal
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FEE test
Detector: A couple of modules, mounted with R1355 Pmts
FEE Configuration

Same as for TOF
MICE CM15 June 2006
Jean-Sébastien Graulich
Slide 3
Hardware Overview
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DAQ
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1 VME Crate, brought from Geneva
Stand alone PC, brought from Geneva
VME/PCI Interface
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CAEN V2718 with optical link to the PC
Trigger
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1 NIM crate for trigger logic, available on site
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Very simple logic, standard NIM modules
MICE CM15 June 2006
Jean-Sébastien Graulich
Slide 4
T1L
CFD
T1R
CFD
T1L
CFD
TDC1
Ch 1
TDC1
Ch 2
Trigger
Request
Start
TDC1
Ch 1
CFD
TIMER
50 ns
FIFO
TDC1
Ch 0
TDC Trigger
TIMER
120 ns
Stop
FIFO
T1R
TIMER
Particle
Trigger
TIMER
50 ns
V2718 O5
(DAQ Ready)
TDC1
Ch 2
TIMER
Delay
30 s
Start
Stop
Veto
EC1L
EC1R
EC2L
EC2R
SPLIT
DISC
NIM-ECL
TDC1
Ch 5
SPLIT
DISC
NIM-ECL
TDC1
Ch 6
SPLIT
DISC
NIM-ECL
TDC1
Ch 7
SPLIT
DISC
NIM-ECL
TDC1
Ch 8
BTF test beam electronics
Logic Scheme
ADC gate
V2718 I0
(DAQ Trigger)
DAQ Software description
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Software choice
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DATE (ALICE DAQ) not available in time
UNIDAQ was an option but
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Dedicated home made software
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No know-how in Geneva and no real interest in getting this know-how…
Provides good training
Limited to single VME-crate/single PC DAQ
Architecture
Run Control
GUI
Monitor
GUI
Readou
t
Monitor
Initialization
Readout
Vme
Modules
MICE CM15 June 2006
Write
Binary file
Read binary
file
Write
Root file
Local Disk
Jean-Sébastien Graulich
Slide 6
Run Control GUI
MICE CM15 June 2006
Jean-Sébastien Graulich
Slide 7
Readout Process

Polling loop on V2718 Input
Arm Modules
yes
Max N_events reach
Or Stop Request
no
no
Disarm Modules
Reset Output Level
(not Ready)
Input Level is Set
yes
Stop
Reset Output Level (not Ready)
Readout Modules
and Write on Disk
N_events ++
Set Output Level (Ready)
MICE CM15 June 2006
Jean-Sébastien Graulich
Slide 8
Readout Process
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Read out TDC and ADC works in Single- an/or
Multi-Event Mode
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Readout of V1X90: up to ~20 MB/s, much less if the
number of hits is small
Readout of 32 hits takes about 40 s
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Readout of V792: limited to ~0.5 MB/s (Block Transfer is
not working), good enough for BTF
Readout of 32 hits takes about 600 s

Readout loop is artificially slowed down to leave
some CPU time for the monitoring
-> Limited to 50 Hz
Should this limit be removed, the readout process can cope
with up to 10 kHz (in Multi-Event Mode).
MICE CM15 June 2006
Jean-Sébastien Graulich
Slide 9
Readout Process
OO structure:

MDbtfAcq
•_moduleList<MDvirtualModule*>
MDvirtualModule
StartRun()
•_moduleType
OpenDataFile()
•_name
ArmDaq()
•_vmeInterface*
MDvmeInterface
AcqLoop()
Readout()
StopRun()
Arm()
•_type
MDvmeModule
Initialize()
ReadCycle()
WriteCycle()
•_baseAddress
ReadBLT()
•_dataBuffer
WriteBLT()
ReadDataBuffer()
SetRegister()
GetRegister()
MDv792
MDv1290
•_controlRegister
•_controlRegister
•…
•…
ReadDataBuffer()
ReadDataBuffer()
->Adding/removing modules from the acquisition is very easy (providing the
readout software for the module)
MICE CM15 June 2006
Jean-Sébastien Graulich
Slide 10
Monitor Process
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Read data on local disk, as soon as they
are written
Decode the data
Fill histograms
Fill ROOT TTree
Broadcast histograms on a Socket every
few events
The Monitor GUI is actually a ROOT
macro, spying on the socket.
MICE CM15 June 2006
Jean-Sébastien Graulich
Slide 11
Monitor GUI
MICE CM15 June 2006
Jean-Sébastien Graulich
Slide 12
Monitor GUI
MICE CM15 June 2006
Jean-Sébastien Graulich
Slide 13
What’s next
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Check portability of the software
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Already installed in Milano. Tests are under way.
Test of FEE options
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Struck SIS3320 200 MHz Flash ADC
Readout OK
Shaper under design
Studying the ultimate time resolution we can obtain
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Time over threshold Discriminator
Not started yet
Plan: - First design and produce the transformer Coax->Differential
- Connect to V1190 (100 ps LSB) with Leading and Trailing
Edge measurements
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Clarify needs for Calibration
Add TDC V775 (?)
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To be discussed with Ludovico and Maurizio
MICE CM15 June 2006
Jean-Sébastien Graulich
Slide 14
Summary
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BTF will use an homemade DAQ software
DAQ software for BTF is ready
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Dedicated stand alone PC (single processor)
Running Stable at 50 Hz
FEE electronics tests are under way
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There is hope to be ready with the Flash ADC
Time over Threshold will not be ready
(Test can be done later without beam)
MICE CM15 June 2006
Jean-Sébastien Graulich
Slide 15