Transcript Slide 1
Summary of experiences with the ALTRO electronics -Excellent noise, ca 350 electrons on one FEC connected to chamber -Routine operation of 10000ch with common threshold at 4 adc channels ( ca 2000 electrons). Problems -Breaking amplifier channels -cooling, vertical FECs, convection sufficient -cooling horisontal FECs, needs forced air cooling . Not a practical solution for the future Broken channels due to discharges in the GEM system Happens too frequently May in the worst case kill a FEC i.e 128ch. Has to be solved Have emulated injection of 20mJ in amplifer input. Kills the internal protection of the channel with same symptoms as real failure. External diode network as below works as protection for emulated input. Will be tested for noise Testing on GEM chamber at next DESY test. Top side FEC-MCM 8 SALTRO16 128 channels Naked Si wirebonded to board 31.5*23.5mm Connectors to Readout board Below side 4 connectors to pad board FPGA Board CTRL LV Voltage regulators Back plane LV&ctrl FEC-MCM Pad panel On a pad panel. 6*6 matrix of FEC-MCM. Total 4608 channels, pad size, 1.0*5.9mm Advantages of MCM module compared to all electronics on the padpanel -trace routing from pads to SALTRO16 becomes simpler - MCM module offers 2 extra layers for components. - electronics prototyping will be cheaper and easier. -parallell prototyping possible -possibility to distribute design and fabrication -analog and digital functions are well separated, - minimal heat transport to the TPCendplate - service by replacement of MCM module. -simpler endplate construction But in the prototype stage where we are now and a couple of years to come we think that an MCM module with 128channels is too risky and expensive -Risky as long as the broken channel problem is not under control -Even if we understand this problem, this electronics will be used in tests of various avalanche chamber prototypes. This is a danger in itself. Expensive to replace 128 channels if one is broken. Expensive to manufacture since the chip yield is unknown and the chance of assembling 8 working but untested chips on a board may be quite low. The SALTRO16 is a rather large chip. The yield can be as low as s 90% (including bonding). Then only 43% of the modules will be OK if there are 8SALTRO per module As a consequence we think that most prototyping has to be made with a smaller MCM module. MCM with 2 SALTRO Bus card Read&ctrl MCM Month 2011 SALTRO CERN MCM LU Read&ctrl LU Buscard LU mar11 Evaluate2 spec spec spec apr11 Evaluate2 Des Des may11 Evaluate2 Des Des Beam test3 old system Des Des Evaluate inp prot3 jun11 comment jul11 aug11 Des Fab Fab sep11 Des Test1 Test1 oct11 Des modify modify nov11 Fab fab fab dec11 Fab verify verify 1Test Read&ctrl with buscard together with RCU. Read small card with PCA16+ALTRO 2 Chip Characterisation 3 Beam test old system at DESY. Decision about input protection Month 2012 SALTRO CERN MCM LU Read&ctrl LU Buscard LU Jan12 Test4 Test4 Test4 Feb12 ReDes Fab Fab Mar12 Fab Fab Fab Apr12 Fab May12 Test Jun12 Fab Jul112 Fab comment FAB 3 module sys PCMAG back at DESY MCM for 3 mod sys Aug12 Sep12 Beam test at DESY Oct12 evaluate Nov12 evaluate Dec11 evaluate