Transcript Slide 1

Small Signal Model
MOS Field-Effect Transistors
(MOSFETs)
1
Quiz No 3 DE 27 (CE)
20-03-07
Rout.
(a)
(b)
(c)
Draw small signal model (4)
Find expression for Rout (2)
Prove vo/vsig = (β1α2RC)/(Rsig+rπ) (4).
Figure 4.2 The enhancement-type NMOS transistor with a positive voltage applied to the gate. An n channel is induced at
the top of the substrate beneath the gate.
Enhancement-type NMOS transistor:
MOSFET Analysis
iD = iS, iG = 0
Large-signal equivalent-circuit model of an n-channel
MOSFET : Operating in the saturation region.
Large-signal equivalent-circuit model of an p-channel
MOSFET : Operating in the saturation region.
Large Signal Model : MOSFET
Transfer characteristic of an amplifier
Conceptual circuit utilized to study the operation of the
MOSFET as a small-signal amplifier.
The DC BIAS POINT
To Ensure Saturation-region Operation
Signal Current in Drain Terminal
Total instantaneous voltages vGS and vD
Small-signal ‘π’ models for the MOSFE
Common Source amplifier circuit
Example 4-10
Small Signal ‘T’ Model : NMOSFET
Small Signal Models
‘T’ Model
Single Stage MOS Amplifier
Amplifiers Configurations
Common Source Amplifier (CS) :Configuration
Common Source Amplifier (CS)
• Most widely used
• Signal ground or an ac earth is at the source
through a bypass capacitor
• Not to disturb dc bias current & voltages
coupling capacitors are used to pass the
signal voltages to the input terminal of the
amplifier or to the Load Resistance
• CS circuit is unilateral –
– Rin does not depend on RL and vice versa
Small Signal Hybrid “π” Model
(CS)
Small Signal Hybrid “π” Model : (CS)
Rin  RG
R o  ro || RD
vo
vo vgs
Gv 


vsig vgs vsig
RG
v gs 
v sig
RG  Rsig
vo   g m vgs ro || RD || RL 
 RG 
vo

Gv 
  g m ro || RD || RL 

v gs
R

R
G
sig


Small-signal analysis performed directly on the amplifier
circuit with the MOSFET model implicitly utilized.
Rin  RG
R o  ro || RD
 RG
vo
  g m ro || RD || RL 
R R
v gs
sig
 G




Common Source Amplifier (CS)
Summary
• Input Resistance is infinite (Ri=∞)
Rin  RG
• Output Resistance = RD
R o  ro || RD
• Voltage Gain is substantial
 RG
vo
  g m ro || RD || RL 
R R
v gs
sig
 G




Common-source amplifier
with a resistance RS in the source lead
The Common Source Amplifier
with a Source Resistance
• The ‘T’ Model is preferred, whenever a
resistance is connected to the source terminal.
• ro (output resistance due to Early Effect) is not included, as it
would make the amplifier non unilateral & effect
of using ro in model would be studied in Chapter
‘6’
Small-signal equivalent circuit with ro neglected.
i
vg
1
 RS
gm
Small-signal Analysis.
Rin  RG
Ro  RD
Voltage Gain : CS with RS
vo
vo vgs vi
Gv 

 
vsig vgs vi vsig
vo   g m vgs RD || RL 
1
gm
vi
vgs 
vi 
1
1  g m RS
 RS
gm
RG
vi 
vsig
RG  Rsig
 RG
vo
 Gv  
R R
vsig
sig
 G
 g m RD || RL  



 1 g R
m S


Common Source Configuration with Rs
• Rs causes a negative feedback thus
improving the stability of drain current of
the circuit but at the cost of voltage gain
• Rs reduces id by the factor
– (1+gmRs) = Amount of feedback
• Rs is called Source degeneration
resistance as it reduces the gain
Small-signal equivalent circuit directly on Circuit
A common-gate amplifier based on the circuit
Common Gate (CG) Amplifier
• The input signal is applied to the source
• Output is taken from the drain
• The gate is formed as a common input &
output port.
• ‘T’ Model is more Convenient
• ro is neglected
A small-signal equivalent circuit
A small-signal Analusis : CG
vi
vi
1
Rin  

ii g m vi g m
Rout  RD
A small-signal Analusis : CG
Gv 
vo
v
v
 o i
vsig vi vsig
vo  g m vi RD || RL 
1
gm
vsig
Rin
vi 
vsig 
vsig 
1
Rin  Rsig
1  g m Rsig
 Rsig
gm
Gv 
vo
g R || RL 
 m D
vsig
1  g m Rsig
Small signal analysis directly on circuit
The common-gate amplifier fed with a current-signal input.
Summary : CG
4. CG has much higher output Resistance
5. CG is unity current Gain amplifier or a Current Buffer
6. CG has superior High Frequency Response.
A common-drain or source-follower amplifier.
Small-signal equivalent-circuit model
Small-signal Analysis : CD
(a) A common-drain or source-follower amplifier
:output resistance Rout of the source follower.
Rout
 1  1
 ro ||   
 gm  gm
(a) A common-drain or source-follower amplifier. : Smallsignal analysis performed directly on the circuit.
Common Source Circuit (CS)
Common Source Circuit (CS) With RS
Common Gate Circuit (CG)
Current Follower
Common Drain Circuit (CD)
Source Follower
Summary & Comparison
Quiz No 4
• Draw/Write the Following:
Types
Symbols
‘π’ Model
T Model
gm
Re/rs
rπ/rg
BJT
npn pnp
MOSFET
nMOS pMOS
27-03-07
Problem 5-44
SOLUTION : DC Analysis
SOLUTION : DC Analysis
5  I E  3.3  0.7  I B  100  0
IE
5  I E  3.3  0.7 
IE 
IB
IE
100  0
(1   )
5  0.7
 1m A
100
3.3 
101
Check for Active Mode
re 
Vt 25

 25
I E 1.0
Solution Small Signal Analysis
Solution Small Signal Analysis
Solution Small Signal Analysis : Input Resistance
ib
+
vb
-
Rin
vb (   1)vb
Rin  
 (   1)re  RC || RL 
ib
ie
Solution Small Signal Analysis : Output Resistance
Itest
IE
IRC
IE/(1+ß)
Rout
Rout
Vtest

I test
I RC
Vtest

RC
I test  I RC  I E I 
E
Vtest
Rsig
re 
(1   )
Rout 
RC  re 
Rsig
Vtest
(1   )

 RC
Vtest
Vtest
Rsig

RC  re 
Rsig
RC
(1   )
re 
(1   )
Rsig 

|| re 

(1   ) 

Solution Small Signal Analysis : Voltage Gain
+
vo
vo veb vi

 
vsig veb vi vsig
veb
-
-
+
Vo
vi
+
-
vo
  g m RC || RL 
veb
Solution Small Signal Analysis : Voltage gain
+
veb
+
vi
-
vo
vo veb vi

 
vsig veb vi vsig
vo
  g m RC || RL 
veb
veb
re

vi
re  RC || RL 
Solution Small Signal Analysis : Voltage Gain
vo
vo veb vi

 
vsig veb vi vsig
vo
  g m RC || RL 
veb
+
vi
-
Rin  (  1)re  RC || RL 
veb
re

vi
re  RC || RL 
vi
Rin

vsig
Rin  Rsig
(1   )re  RC || RL 

(1   )re  RC || RL  Rsig
Solution Small Signal Analysis : Voltage Gain
vo
vo veb vi

 
vsig veb vi vsig
veb
re

vi
re  RC || RL 
vo
  g m RC || RL 
veb
vi
Rin

vsig
Rin  Rsig
vo
re
Rin
  g m(RC||RL ) 

vsig
re  (RC || RL ) Rin  Rsig
vo
(RC||RL )
Rin
 g m re 

vsig
re  (RC || RL ) Rin  Rsig
vo
(RC||RL )
Rin
 

vsig
re  (RC || RL ) Rin  Rsig
Solution Small Signal Analysis : Voltage Gain
vo vo vi
 
vsig vi vsig
+
vi
-
Vo
+

vo
RC || RL 

vi re  RC || RL 
vi
Rin

vsig
Rin  Rsig
vo
(RC||RL )
Rin


vsig re  (RC || RL ) Rin  Rsig
Problem
Small Signal Model MOSFET : CD
Solution Small Signal Analysis
1/gm
D
gmvsg
Solution Small Signal Analysis : Input Resistance
1/gm
Ig=0
D
gmvsg
Rin
Rin  
Solution Small Signal Analysis : Output Resistance
Itest
1/gm
ID
IRD
D
IG=0
Vtest
gmvsg
Rout
Rout
Vtest

I test
I test  I RC  I D
I RD
Vtest

RD
Vtest
ID 
1
gm
Rout
Vtest
1

 RD ||
Vtest Vtest
gm

RD 1 / g m
Solution Small Signal Analysis : Voltage Gain
+
vsg
1/gm
-
-
+
vi
-
vo
vo vsg vi

 
vsig vsg vi vsig
gmvsg
D
+
vo
  g m RD || RL 
vsg
Solution Small Signal Analysis : Voltage gain
+
vsg
vo
vo vsg vi

 
vsig vsg vi vsig
1/gm
D
+
vi
-
gmvsg
vo
  g m RD || RL 
vsg
vsg
vi
1

1
gm
gm
 RD || RL 
Solution Small Signal Analysis : Voltage Gain
vo
vo vsg vi

 
vsig vsg vi vsig
vo
  g m RD || RL 
vsg
+
vi
-
vsg
vi
1

1
gm
vi  vsig
Rin  
gm
 RD || RL 
Solution Small Signal Analysis : Voltage Gain
vo
vo vsg vi

 
vsig vsg vi vsig
vo
  g m RD || RL 
vsg
vsg
vi
1

1
gm
gm
 RD || RL 
vi  vsig
vo
  g m(RD||RL ) 
1
vsig
 1
gm
gm
 (RD || RL )
vo
(RD||RL )

1  (R || R )
vsig
D
L
gm
Solution Small Signal Analysis : Voltage Gain
vo vo vi
 
vsig vi vsig
+
vi
-
+

vo
RD || RL 

1  R || R 
vi
C
L
gm
vi  vsig

vo
RD || RL 

1  R || R 
vsig
C
L
gm
Solution Small Signal Analysis
Rin  (  1)re  RC || RL 
Rout
Rsig 

 RC || re 

(
1


)


vo
(RC||RL )
Rin


vsig re  (RC || RL ) Rin  Rsig
 
 1
Rin  
Rout
1
 RD ||
gm
RD || RL 
vo

1  R || R 
vsig
C
L
gm
Problem 6-127(e)
DC Analysis 6-127(e)
  100
I E1  0.5m A
I B1  0.5 / 101 5A  0
I C1  0.5m A
  100
I E 2  0.5m A
I B 2  0.5 / 101 5A  0
I C 2  0.5m A
VC1  5  0.7  4.3V
VC 2  10 0.5  10  5V
VC1  VB1  0.4V  10 5  (10) 3  0.4  0.4V VC 2  VB 2  0.4V  5  0.4V  4.6V
Q2 in Active mode
Q in Active mode
1
Small Signal Model
Small Signal Model
Small Signal Model
Rin
Rin  r 1
Rout  RC Vsig  0
vo
vo veb2 vbe1



vsig veb2 vbe1 vsig
Rout
vo
 g m 2 RC
veb2
vbe1
r 1
veb2

  g m1re 2
vsig r 1  Rsig
vbe1
vo  g m 2 RC g m1re 2 r 1  1 2 RC


vsig
Rsig  r 1
Rsig  r 1
Problem6-127(f)
Replacing BJT with MOSFET
Small Signal Model
Small Signal Model
Small Signal Model
Rin
Rin  
Rout  RD Vsig  0
vo
vo vsg 2 vgs1



vsig vsg 2 vgs1 vsig
Rout
vo
 g m 2 RD
vsg 2
vsg 2
vgs1
vo
 g m 2 RD g m1

  g m1RD
vsig
gm2
g m1

gm2
vsg 1  vsig
Rin  r 1
Rout  RC
vo
 1 2 RC

vsig Rsig  r 1
vo
  2 RC

1
vsig Rsig

1 g m1
Rin  
 
 1
Rout  RD
vo
  g m1 RD
vsig
Problem 6-127(f)
Solution P6-127(f)
+
vbe2
+
veb1
-
Solution P6-127(f)
vb1
Rin 
 (1  1 )(re1  re 2 )
ib1
Rout  RL
+
vbe2
+
veb1
+
vi
-
vO
vO vbe 2 vi



vsig vbe 2 vi vsig
vO
  g mR L
vbe 2
vbe 2
 re 2

vi
re1  re 2
vi
Rin
(1  1 )(re1  re 2 )


vsig Rin  Rsig (1  1 )(re1  re 2 )  Rsig
vo
g m 2 RL re 2 (1  1 )(re1  re 2 )
g m 2 re 2 (1  1 ) RL
(1  1 ) 2 RL



vsig re1  re 2 (1  1 )(re1  re 2 )  Rsig (1  1 )(re1  re 2 )  Rsig (1  1 )(2re )  Rsig
Problem 6-127(f) with MOSFET
Solution P6-127(f)
+
vgs2
+
vsg1
-
Solution P6-127(f)
Rout
+
vgs2
+
vsg1
ig1=0
+
vi
-
vi
Rin 

ig1
 RL
vO
vO vgs 2 vi



vsig vgs 2 vi vsig
vO
  g mR L
vgs 2
 1
gm2
 g m1


1
vi
g m1  g m 2
 1
g m1
gm2
vgs 2
vi  vsig
vo
g g R
g R
 m 2 m1 L  m L
vsig g m1  g m 2
2
Comparison BJT/MOSFET Cct
Rin  (1  1 )(re1  re2 )
Rout  RL
vo
(1  1 ) 2 RL

vsig (1  1 )(2re )  Rsig
 
 1
Rin  
Rout  RL
vo
g R
 m L
vsig
2
Small Signal Model
Problem 6-123
VBE=0.7 V
β =200
K’n(W/L)=2mA/V2
Vt=1V
Figure P6.123
DC Analysis
Figure P6.123
VBE=0.7 V
β =200
K’n(W/L)=2mA/V2
Vt1=1V
Vt2=25mV
DC Analysis
I D1  I S1  o.1mA,
I B2  0
W 
2
I D1 1  K 'n  VGS  Vt 
2
L
1mA
2
0.1  1  2VGS  1  VGS  1.316V
2
2V
VC 2 V GS V BE 2V
IG0.7V
=0
52
I  I C 2
 1mA
3
g m1 
I=0.7/6.8=0.1mA
gm2 
2 I D1
 0.63m A/ V
VVOV
I C2

 40m A/ V , r 2 
 5k
Vt
gm2
Small Signal Model
Small Signal Model
Small Signal Model : Voltage Gain
vo
v
v
v
 o  be 2  i
vsig vbe 2 vi vgs1
vo
  g m 2 ( RL || RC )  -30V/V
vbe 2
Negelecting effect of RG  10M
ig=0
+
vi
-
+
vbe2
-
vbe 2
( RS1 ||r  2 )

 0.64V / V
1
vi
 ( RS1 ||r  2 )
g m1
vi
Rin

 0.83V / V
vsig Rin  Rsig
Ri n
v0
( RS1 ||r  2 )
  g m 2 ( RL || RC ) 

 16V / V
1
vsig
 ( RS1 ||r  2 ) Rin  Rsi g
g m1
Small Signal Model : Input Resistance
ii
ig=0
+
vi
-
Rin
vi
vi
RG
R in  

 495k
i i vi  vo  / R G 1  vo
vi
v0
( RS 1 ||r  2 )
  g m 2 ( RL || RC ) 
 19.2V / V
1
vi
 ( RS1 ||r  2 )
g m1