Transcript Lecture 1: Course Introduction and Review

Sensor Network Hardware
Platform Design
Andreas Savvides
Embedded Networks and Applications Lab
ENALAB
http://www.eng.yale.edu/enalab
YALE EE & CS Departments
April 27, 2005
Research Supported by:
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Hardware Platform Design
• Platforms in applications and deployments
– Computation requirements in applications and design
• Platforms vs. application needs
– Hardware design and interface issues
• Experiences with the platform development process
• Emphasis topic: Hardware characterization
– Power characterization is discussed in SPOTS papers/posters
– I will pick on antenna behaviors in 3-D scenarios
• Algorithms and platforms should change together
– HW platforms can still change the way we think about
algorithms
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Hardware Sensing Platforms
HW Platforms
Shrink the HW
Experiment with unknown environments
NIMS Nodes
@UCLA
UC Berkeley’s Spec Node & Smartdust
Intelligent Integrated Sensing Network
Platforms
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Hardware Platform Priorities
HW Platforms
Shrink the HW
Power & Cost Reduction
Experiment with unknown environments
Understanding unknown
NIMS Nodes
sensing phenomena @UCLA
UC Berkeley’s Spec Node & Smartdust
Intelligent Integrated Sensing Network
Platforms
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Platforms vs. Application Needs
Each application has different computation,
memory and interface requirements
• Wide range of applications & requirements:
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Surveillance
Medical care
Structural health monitoring
Traffic management
Tracking fires
Environmental exploration
Child motion monitoring
• Hard to create a single platform for all
applications
Links to SPOTS Platforms - Pages 429 – 431
of the proceedings
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Opportunities for New HW at
Different Levels
• Processor core
– New instructions
– Support for different power modes
• Peripherals
– Need new custom peripherals
– Often running as different HW treads
• Sensors
– Create new sensing modalities
– Move computation and intelligence inside the sensor
• Still many tradeoffs and engineering
challenges to address
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When should you attempt to build a
new platform?
• If you have a specific problem in mind for
which existing platforms won’t suffice
• If you plan to create a hardware component
for which you need tight control of the
hardware
• If cost and size become a limiting issue
• Need to consider
– What is the benefit of having own platform?
– Is this going to enable or handicap your research
effort?
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Plan your priorities
• What is your design objective?
– Avoid building new HW for the sake of building
– Target a specific feature or application
• Power consumption vs. proof of concept
– Which is more important to you?
• Proof of concept
– Over-design vs. under-design
– If the algorithm is known, size and power become the
focus
– If the algorithm/application is not known you need to
relax the constraints
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Before you begin to build a sensor
node
• Are the tool chains available?
– Make sure you have all the tools you need to complete
the cycle available
» Flash programmer
» Compiler
» Debugger & JTAG tools
• Is the processor chip you are using mature?
– If not, then don’t use it unless you have collaboration
with the manufacturer
– Get the development kit first and try to write software
before you start
• Does the radio you are using have software
support/tools?
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Design Tools and Component
Selection
• Try to use well established packages, ORCAD for
instance
– Typically available from the CAD tools suite
– Easier to find/share component footprints
» This is one of the most time-consuming and error-prone
part of the process
• Make sure you select the right components
– Components come in different packages
– Components have different cost and power consumption
• Good idea to purchase all the components before the
prototype PCB is sent to fabrication
• If you plan to build large numbers, talk to people
who did it before first
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Design Considerations
• Design for manufacturability
– Take into account that you need to build more
– Plan for an economical way to do it
• Capitalize on the fabrication cycle
– Most companies have reduced rates for 4 week runs
– Assembly houses may have specific requirements on assembly
» Find out about this before you begin
• Talk to the assembly house before you finalize your
design
– Some PCB boards and components will require fiducial points
for machine assembly
– Some manufacturers may be able to suggest alternative
components
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• Put testpoints for debugging and power
characterization during operation
• Be careful with radios – they have specific PCB
requirements
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Developing your PCB
• Look around for existing designs first
• Investigate parts
– Availability, packaging, power consumption & cost
• Get your tools together for the whole process first
• Schematic capture and review process
• Layout
– Double check your component footprints
– Talk to the manufacturer – some places charge less for 1
phase board
– Odd number of layers does not save you money
– Make sure you follow the manufacturer directions for radio
laout
– Make sure you wire the board for test & measurement
• Plan for testing
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SmartKG iBadge Platform
(NESL/UCLA)
• One of the most highly integrated sensor platforms
• Hard to build – very small components 0201 components,
difficult to machine assemble
• Production and assembly costs is a limiting factor
• Lots of educational value!
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Study Case – Building the XYZ
• Work with Cogent Computer
– Small single board computer company in Rhode Island
– Already has expertise and interest in embedded ARM
• Collaboration with OKI Semiconductor
– Make sure that all the peripherals are available
• Talk to Chipcon to make sure they would have an
IEEE 802.15.4 MAC available
• Design prototype according to our specification
• Second pass design with Cogent Computer
– Identify inexpensive components
– Make the design easier to manufacture
» 1 side, 6-layer board
» Placement done to accommodate hand and machine
assembly
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Example: XYZ Mobility & Ultrasound
Board
• Align components to make low production
assembly and debugging more efficient
– Makes hand assembly or low end machine assembly
easier
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Lessons Learned
• Don’t bother soldering everything by hand
• Look for places esp. local shops that can help you
• If the layout is too complex, outsource to an expert
– Cost is the same if you consider the lost time and the
possibility of bugs
• Pace yourself
– Long, organized planning period
– Fabrication & assembly cycle (2 to 6 weeks)
• Have a support strategy for the system
– How are you going to make more, distribute it, test it, use it
etc.
• Plan for iterative implementation and customization
– After some field deployment you will probably need to make
some changes
• Verify the software and programming cycle before
you finalize the hardware design
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Lessons Learned
• Go for the mainstream design tools
• Design for manufacturability and testability
• Be aware of what if already available
– Look into the community to see if there are pieces you
can reuse
– Reconsider picking platform development as a research
topic if other companies are doing it
» Ember & OKI have IEEE 802.15.4 implementations
on radio chip
» re-implementing the same MAC w/o a longer term
plan will have short half-life
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After Fabrication Completion
• Have a test strategy in mind for SW & HW
– Write diagnostic code to check each subsystem
– Diagnostic code should become part of the runtime
environment
• Treat your new platform as a new device.
Characterize it!
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–
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Characterize power consumption at different modes
Characterize platform in a realistic environment!
Push the platform to the limits, know where things break down
Post your data, this is would be the most valuable asset to
the community
• Example: Antenna Characterization for CC 2420
– PCB design affects the antenna
– Characterize radio and antenna properties in 3D!
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Chipcon CC2420 Radio Power Levels
Level
TX Power(dBm)
1
0
Power Consumed (mW)
31.32
2
3
4
5
6
7
-1
-3
-5
-7
-10
-15
29.7
27.36
25.02
22.5
20.16
17.82
8
-25
15.3
P(mW)
(mW )
1mW
 RSSI_VAL  RSSI_OFFSE T [dBm]
P(dBm)  20log
PRX
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RSSI_VAL = Computed by the radio over 8 symbol periods (128us)
RSSI_OFFSET= Determined experimentally, based on front end gain
(around -45dBm)
Approx. Range at power level 6 in an office corridor = 30ft
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Antenna Length 2.9cm
Radio Calibration for TX and RX
Each radio chip is different
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10
Different
Transmitters
40cm
10
Different
Receivers
40cm
E[Pr]=29.94dBm
σ=2.7dBm
E[Pr]=26.375dBm
σ=2.88dBm
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Orientation variations at ground level
 Repeat experiment for 4 different nodes, same receiver:
• TX Power -15dBm
• 8 different positions, 4 orientations for each position
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Node ID
E(RSSI_VAL)
σ(RSSI_VAL)
0x0019
25.75
1.159
0x0008
27.48
1.46
0x0022
28.1
1.16
0x001F
30.92
0.98
Across all nodes
28.0625
2.15
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Indoor Path Loss Measurements
Floor measurements in a 24 x 20ft lounge – no obstacles
-40
0
5
10
15
20
RSSI(dBm)
-50
-60
Same power level using suboptimal antenna
η=3
-70
-80
-90
-100
Distance (feet)
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Indoor Path Loss Measurements
Floor measurements in a 24 x 20ft lounge – no obstacles
-40
0
RSSI(dBm)
-50
5
10
RSS(d)  PT  P L(d0 )  10 log 10
-60
-70
15
20
d
 X
d0
PT  transmitpower,
P L(d0 )  pat hloss at a referencedistanced 0
-80
 - pat hloss exponent
-90
X  N (0,  2 )
-100
Distance (feet)
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Monopole Antenna Radiation Pattern
Side View
Top View
Communication
range
Symmetric Region
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Communication range
Antenna orientation
independent regions
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RSSI at Different Antenna
Orientations
Best Orientation: 135 degrees
-20
-25
6.5ft
3.5ft
1.5ft
-25
6.5ft
3.5ft
1.5ft
-30
-35
-30
-40
-35
-45
-40
-45
0
Worst Orientation: 180 degrees
5
10
15
Distance(feet)
20
25
-50
0
5
10
15
20
25
Distance(feet)
At the bad orientation, antenna has to be at
similar height to get proper results
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3-D Radio Connectivity
Connectivity at Power Level 7
13
15
12
16
11
19
2.5
21
10
26
2
Z coordinate
9
14
17
23
18
24
4
20
1.5
3
2
7
22
1
41
0.5
5
42
29
1
31
30
32
0
5
39
40
38
28
33
34
27
36
35
4
3
6
5
37
4
2
3
2
1
0
15
X coordinate
13
12
15
11
19
21
18
25
3
2
7
22
1
41
0.5
5
42
29
1
39
30
38
8
6
25
6
5
37
4
2
3
2
41
5
31
39
40
28
33
27
36
35
4
3
4
2
Y coordinate
6
5
37
3
2
1
X coordinate
30
34
38
3
0
42
29
1
1
0
7
22
1
2
1
4
20
0
5
36
3
24
1.5
32
27
35
Y coordinate
18
28
33
34
4
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10
26
0.5
31
32
40
9
14
17
23
4
20
0
5
21
2
24
1.5
2.5
8
6
Z coordinate
Z coordinate
2
11
19
10
26
12
16
9
14
17
23
0
Connectivity at Power Level 4
13
2.5
1
Y coordinate
Connectivity at Power Level 6
16
8
6
25
1
0
0
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X coordinate
Link Asymmetry in 3D-scenarios
36
34
One way
32
30
28
26
24
22
20
1
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2
3
4
5
6
7
Power Level ( 1 - Maximum power level )
8
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RSS Asymmetry at Different Power
Levels
Percentage of Assymetric Links
55
dBm diff.  2
50
45
40
dBm diff.  3
35
30
dBm diff.  4
dBm diff.  5
dBm diff.  6
25
20
1
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2
3
4
5
6
Power Level (1 - Maximum power)
7
8
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Platforms in Undergraduate
Curriculum – Setting up a lab
EENG 449
Computer Systems
• Computer Architecture
• Embedded Processors
• Assembly Language
EENG 460a
Networked
Embedded Systems
& S. Networks
• Embedded and Real Time OS
• Radio Technologies and MAC
• Routing for small devices
• Sensor network applications
• Self-Configuration
• Data Storage
• Mobility and Actuation
Capstone
Project
• Expect to have a research
caliber project
• Undergraduates participate on
research papers
Most important assets:
1. Develop HW intuition early on
2. Have fault diagnostic code for the device
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Conclusions
• Building HW is a great learning experience and adds
to the diversity
• Useful to uncover new ideas and concepts
• More insight, more prudent researcher
• Close consideration with software design is crucial
– HW changes faster than SW
• One of the biggest challenges
– Radio technology
– There is a large domain of problems for which the radio may
not be sufficient
– Need to become more critical of radio capabilities in
applications
– Try out different radios!
• Data traces and benchmarks are still missing
– Need better ways of reporting power and performance
– Utility value in terms of the application should be factored in
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