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CROWNE
Current Ratio Outlier With
Neighbor Estimator
Sagar S. Sabade
Duncan M. Walker
Department of Computer Science
Texas A&M University
College Station, TX 77843-3112
http://ee.tamu.edu/~sagar
Outline






Introduction
Variability in Current Ratios
Use of Wafer Spatial Information
– NCR metric
Combining Multiple Parameters
Experimental Results
Conclusions
Introduction

IDDQ test needs to survive in DSM era
 Many methods reported in literature
– Goal: Reduce variance in “fault-free” IDDQ
 Current Ratio (CR)
– Ratio of maximum to minimum IDDQ of a chip
– Within-chip IDDQ variation similar for fault-free
chip (magnitudes may differ)
– Ease of implementation in production
CR Variation for Real Chips

Can CR detect all defective chips?
Die E: CR 1.08
A
B
C
D
E
Smaller CR does not
necessarily imply
a fault-free chip – it
may be a passive defect!
IDDQ (A)
IDDQ (A)
Die D: CR 7.1
10
10
1
1
Die C: CR 1.68
Die B: CR 4.44
0.1
0.1
0
50
100
Vector number
150
200
Die A: CR 5.66
0
50
100
Vector number
150
200
Why Use Spatial Information?
spatial outliers
70
Neighboring fault-free
Chips have similar IDDQ
For same vector
60
40
30
20
X-co
8
ordin
ate
10
6
12
14
4
16
2
8
i na
6
rd
4
oo
2
20
18
16
14
12
10
te
10
Yc
IDDQ (A)
50
Neighbor Current Ratio (NCR)

Take ratio of IDDQ of neighboring chips for
same vector [details in our DFTS 02 paper]
NCR (i) =
IDDQ (chip1) (i)
IDDQ (chip2) (i)
IDDQ
Chip 1 IDDQ readings
Chip 2 IDDQ readings
N Nbrs, k vectors
 N.k NCR values
NCR = Max (NCR(i))
Vector Number
Combining CR and NCR
“CROWNE” chips

1000

100
NCR

10
Gross outlier tail
Single metric alone not
enough to catch defects
CR looks “within-chip”
variability
NCR considers local
neighborhood variation
– Easy to detect passive
defects with fewer
vectors
1
0.1
1
10
100
CR
1000
CR/NCR Combination Insights
NCR
Region A
Nominal CR
Subtle active defects
Spatial Outliers
Region B
CR, NCR Outliers
Active defects
NCR
Threshold
Region D
Nominal CR,NCR
Fault-free Chips/
Good chips in
Bad neighborhood
Passive
defects
1
Region C
Outliers in
Bad neighborhood
CR Threshold
CR
CROWNE Chips

Chips that are okay with CR alone
– But are outliers when neighboring chips are used
 Are these chips
– Defective?
 should be rejected
– Different?
 okay to ship
– Weak?
 reliability concern
CR, NCR and Flush Delay
1000
560
540
520
Flush delay (ns)
NCR
100
10
A
1
B
0.1
1
10
100
1000
outlier
500
480
460
440
420
400
380
360
340
320
3000
A
B
1
2
3
4
CR
5
6
7
8
CR
XY projection
9
10
0
1
2
3
4
5
6
NC
7
R
8
9
10
How does combination help us?
CR
NCR
Delay
Result
Low
Low
Small
Large
Fast wafer region
Resistive short/defect?
Low
High
Small
Large
A chip with passive defect
in a good neighborhood
High
Low
Small
Large
A chip with active defect
in a bad neighborhood
High
High
Small
Large
A chip with active defect
in a good neighborhood
Analysis of SEMATECH Data
–
–
–
–
–
–
–
0.6  technology
12521 chips
four test types – IDDQ, stuck-at, functional, delay
195 IDDQ readings/chip, threshold 5 A
Screened all chips above 100 A, obvious outliers
Flush delay > 500 ns considered outlier
CR, NCR threshold decided from CDF


CR threshold 5
NCR threshold 10
CR/NCR scatter plot for low CR
1000
NCR
100
10
More passive
More active
1
1.0
1.1
1.2
1.3
CR
1.4
1.5
CR/NCR scatter plots
Some delay failures can be identified by NCR
– No systematic pattern
100
NCR

10
Delay-only fail
Delay+IDDQ fail
1
1
10
100
CR
Flush delay/NCR scatter plot
Poor correlation between NCR and flush delay
– NCR cannot screen delay failures well
Delay-only fails
IDDQ+Delay fails
550
500
Flush delay

450
400
1
10
100
NCR
Conclusion

Low CR is deceptive
– Can be passive defect; reliability hazard
– Spatial information useful (e.g. NCR)
 Combination of CR/NCR has better outlier
screening
– NCR not suited for delay failures
– Additional screen needed
 More data analysis needed to validate claims