Transcript Document

Smart Universal Sensor
and Transducer Interface
Prof. Sergey Y. Yurish,
Technical University of Catalonia
(UPC-Barcelona)
SENSOR 2007, Nurnberg, Germany, 23 May 2007
Contents
Introduction
Quasi-Digital Sensors and Integrated Frequency-toDigital Converters
Universal Sensors and Transducers Interface (USTI)
Intelligent Features
Applications
Conclusions
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Introduction
There is an evident outdistancing in the progress in
frequency-time domain sensor technologies in
comparison with the progress in new techniques for
interface circuits and methods for data processing
Development of sensor electronics is still a complex
task, which requires special know-how and experience
in a multi-disciplinary fields
There are quasi-digital sensors and transducers with
frequency, period, duty-cycle, pulse-width modulated
(PWM) and pulse number output with high accuracy
(0.01…0.003 %) and wide frequency range from
several hundredth parts of Hz up to several tens MHz
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Sensors (IFSA study 2006)
Quasi-Digital
20%
Analog
55%
Digital
25%
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Quasi-Digital Sensors
Duty-cycle
9%
Pulse Number
3%
Period
1%
Phase-shift
1%
PWM
16%
Frequency
70%
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Integrated FDCs
USP-30 one-chip specialized microprocessor (1980)
IC of ALU for time interval measurements (1989)
K512PS11 - frequency-to-digital converter (1990)
USIC - universal sensor interface chip (1996)
Single-chip (FPGA) interpolating time counter
ASIC of single channel frequency-to-digital converter
(1999)
Frequency-to-digital converter from AutoTEC
Time-to-Digital Converter (TDC) from Acammesselectronic GmbH (Germany)
SSP1492 - Sensor Signal Processor from Sensor
Platforms, Inc. (USA, 2006)
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ICs Disadvantages
All ICs except TDCs are based on conventional methods
of measurement, hence, quantization error is dependent
on measurand frequency fx , many of ICs have
redundant conversion time
They cannot be used with all existing modern frequencytime domain sensors due to low accuracy or/and narrow
frequency ranges
They do not cover all frequency–time informative
parameters of electric signals.
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Modern FDC Requirements
Should have a programmable relative error
High accuracy
Non-redundant and minimum possible conversion
time
Wide frequency range
Multifunctionality
Should be based on advanced conversion methods
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Universal Sensor and
Transducer Interface (USTI)
Low cost digital IC with programmable accuracy
2 channels, 29 measuring modes for different frequencytime parameters, one generating mode (fosc/2 = 10 MHz)
and direct conversion of resistance, capacitance
resistive bridge parameters of different sensing elements
Based on four patented novel conversion methods for
frequency (period), duty-cycle, frequency (period) ratio
and phase shift
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Features
Frequency range from 0.05 Hz up to 9 MHz without
prescaling and 144 MHz with prescaling
Programmable accuracy (relative error) for
frequency (period) conversion from 1 up to 0.0005 %
Relative quantization error is constant in all
frequency range
Non-redundant conversion time from 5 s to 0.01 s.
Improved quartz-accurate calibration
RS-232/485, SPI and I2C interfaces
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Conversion Time

N
1
, if
 Tx
t conv 
fx
f0


N
N

 Tx
t conv  f  0  Tx , if
f0
0

where fo is the reference frequency; N =1/x is the number
proportional to the programmable relative error x; Tx=1/fx is the
period of unknown frequency.
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Modeling Results
tconv, s
tconv, s
x
x
a)
b)
Modeling results for dependence of tconv =  (f0, ) at range of variables
f0=625 kHz …20 MHz, x = 0.001…0.000005 (a), and x = 0.01…0.001 (b)
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Relative Error vs.
Conversion Time
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UFDC-1
(at f0=500 kHz)
UFDC-1M-16
(at f0=16 MHz)
USTI
(at f0=625 kHz)
USTI-1M-20
(at f0=20 MHz)
Relative
error,
x %
N =1/x
1
100
0.0002
0.00000625
0.00016
0.000005
0.5
200
0.0004
0.0000125
0.00032
0.00001
0.25
400
0.0008
0.000025
0.00064
0.00002
0.1
1000
0.002
0.0000625
0.0016
0.00005
0.05
2000
0.004
0.00125
0.0032
0.0001
0.025
4000
0.008
0.0025
0.0064
0.0002
0.01
10000
0.02
0.00625
0.016
0.0005
0.005
20000
0.04
0.00125
0.032
0.001
0.0025
40000
0.08
0.0025
0.064
0.002
0.001
100000
0.2
0.00625
0.16
0.005
0.0005
200000
-
-
0.32
0.01
tconv, s
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USTI Evaluation Board
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Evaluation Board Circuit
Diagram
+5V
C2
0.1
IC3
1
3
4
XS1
5
C4
0.1
1
2
3
13
C1+
VCC
C1-
V+
C2+
V-
C2-
GND
R1IN
R1OUT
8
5
C3
0.1
16
2
1
IC1
1
2
3
6
J5
3
15
12
J4
2
3
1
4
2
C5
0.1
5
IC2:2
1
2
3
4
ZQ1
20.0MHz
74HC14D
IC2:6
13
12
74HC14D
IC2:5
11
10
9
74HC14D
74HC14D
10
IC2:3
6
7
6
+5V
IC2:1
9
R2OUT
14
T1OUT
7
T2OUT
R2IN
11
T1IN
10
T2IN
4
J1 MASTER
C1
0.1
ST202D
8
11
7
8
9
6
9
C7
20pF
TXD/IS1
M2/A2
FX1
M1/A1
FX2
M0/A0
ST1
MES/BS
VCC
GND
C8
20pF
J2 M2/A2
28
27
R2 1k
J3 M1/A1
26
25
R3 1k
J6 M0/A0
24
23
22
R4 1k
J7 N2
21
GND
OSC1
NC
20
VCC
19 +5V
SCK/N2
18
MISO/N1
17
MOSI/N0
16
SS/TEST
15
CE1/BW
OSC2
11
ST2
12
CE2/BN
13
SMPL
14
CHRG
1 J10 3
2
8
12
74HC14D
SCL
SDA/IS0
10
IC2:4
5
13
C6
0.1
NC
RXD
+5V
R1 1k
R5 1k
R6 1k
J8 N1
J9 N0
USTI
R9 220
74HC14D
14
15
XT1
XT2
16
1
17
18
2
R7
100k
R8
100k
1
XT3
2
19
20
21
XT4
XT5
XT6
1
1
1
1
2
2
2
2
2
22
23
24
25
D1
W02M
DB25-F
J11
2
+5V
IC4
7805
1
7...14V AC/DC
C9
470uF/16V
IN
+5V
GND
2
470 R10
3
C10
0.1
D2
Power
1
15
XT7
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USTI I2C Interface
FX1
FX2
+5V
XP1
IC1
1
1
2
2
3
3
4
4
J1
5
6
ZQ1
20.0MHz
C3
0.1
7
8
9
10
11
C1
20pF
C2
20pF
12
13
14
NC
SCL
RXD
SDA/IS0
TXD/IS1
M2/A2
FX1
M1/A1
FX2
M0/A0
ST1
MES/BS
VCC
GND
GND
NC
OSC1
VCC
OSC2
SCK/N2
ST2
MISO/N1
CE2/BN
MOSI/N0
SMPL
SS/TEST
CHRG
CE1/BW
28
SCL
27
26
J2
25
J3
24
J4
SDA
23
22
21
20
+5V
19
18
17
16
TEST
15
USTI
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USTI SPI Interface
FX1
FX2
+5V
IC1
XP1
1
1
2
2
3
3
4
4
J1
5
6
C3
0.1
ZQ1
20.0MHz
7
8
9
10
11
C1
20pF
C2
20pF
12
13
14
SCL
NC
SDA/IS0
RXD
TXD/IS1
M2/A2
FX1
M1/A1
FX2
M0/A0
ST1
MES/BS
VCC
GND
GND
NC
OSC1
VCC
OSC2
SCK/N2
MISO/N1
ST2
MOSI/N0
CE2/BN
SS/TEST
SMPL
CE1/BW
CHRG
28
27
J3
26
25
24
23
22
21
20
+5V
19
SCK
18
MISO
17
16
J2
MOSI
SS
15
TEST
USTI
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Intelligent (Smart) Features
Self-adaptation: a possibility (a flexibility to
change accuracy for speed and opposite during
each of measurement)
Self-identification: a possibility to keep in the
USTI’s flash memory an IEEE 1451 Transducer
Electronic Data Sheet (TEDS) with the aim to
simple sensor configuration in a system
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TEDS Example
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Network-Capable
Application
Processor
(NCAP)
IEEE 1451.2
Distributed
Multidrop Bus
IEEE 1451.3
TEDS
FDC
Txdcr Bus
Interface
Digital,
Point-to-Point
Digital TII
Interface
IEEE 1451 Standard
Txdcr
TEDS
FDC
Txdcr
Smart Transducer
Interface Module
(STIM)
Transducer Bus
Interface Module
(TBIM)
Network
IEEE
1451.1
Common
Object
Model
IEEE
1451.0
Common
Functiona lity &
TEDS
IEEE 1451.5
Frequency+
Digital
Wireless
Interface
Wireless
Txdcr
20
FDC
TEDS
IEEE 1451.4
Any Network
TEDS
Txdcr
Wireless
Transducer
Mixed -Mode
Transducer
TII - Transducer Independent Interface
Txdcr - Transducer
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Physical Representation
of IEEE 1451.2
UFDC-1
Sensor
FDC
Bus
Interface
TII bus
NCAP
TEDS
IEEE 1451.2
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Mix-Mode Interface for
Frequency Sensors
IEEE 1451.4 Plug-and-Play Sensor
Data Acquisition System
Frequency
SchmittTrigger
Sensor
Digital
TEDS
Frequency
Signal
Output
Digital
Signal I/O
Class II multiwire interface
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Applications
Frequency-time domain sensor including digital,
multiparameters, multifunctional, smart sensors and
systems
High-end, mid- and low-range ABS
Desktop and handheld multifunctional frequency counters
Multimeters for frequency-time parameters of signals
Tachometers and tachometric systems
DAQ systems (boards) for frequency-time parameters
Virtual instruments
Communication applications
Measuring systems for analytical chemistry, electronic
noses and tongues, etc.
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Conclusions
USTI will simplify significantly a digital sensors and
smart sensor systems design process
Reduce development time, time to market and
production price
In comparison with the direct microcontroller
interfacing the USTI IC lets to eliminate many design
problems
Manufacturers will receive a unique opportunity to
produce low-cost IEEE 1451 compatible sensors with
minimum possible hardware
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Acknowledgment
This work was supported by the International Frequency
Sensor Association (IFSA), Sensors Web Portal, Inc.
(Toronto, Canada) http://www.sensorsportal.com and EC
Marie Curie Chair (EXC) grant in the frame of project
MEXT-CT-2005-023991 SMARTSES.
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Questions ?
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