Transcript Microprocessor/PCB Design

Microprocessor PCB Design
by:
Tuan Hung Huynh
April 3, 2006
Outline

Background
 Design Process
 Application
 Results
Purpose

Designing computer circuits and software
for the Microprocessor class.
 PCB layout software
 Documentation
Background
Past Designs

People to mention
–
–
–
–
–
–
Wi Sugiri (projects)
Dan Sossaman (board)
Neil Clukode
Matt Olson
Tuan Huynh
Chris Carpenter
Microcontroller

Microcontroller or Microprocessor?
– Microcontroller – basic
– Microprocessor - complex

Atmel and Intel 8051 core
architecture
– AT89S8252 (8052)
– AT89S8253 (8053)
Design Process
Structure







Developing the schematic layout
Updating and improvements
Ordering of components
Developing software
Transforming into a workable circuit
Testing and demonstration
Optional manufacture
of the PCB
Protel

Schematic Layout
3
1
2
C8
2.2uF
U9
1
5
18
16
17
6
7
8
9
19
1
2
3
4
5
6
7
8
Programming
R4
DIR
A4
B1
B3
B2
A5
A6
A7
A8
OE
10
15
2
4
3
14
13
12
11
20
GND
B4
A1
A3
A2
B5
B6
B7
B8
VCC
MISO
MOSI
SCK
RST
GND
TO U1-6
C7
.1uF
VCC
GND
VCC
FROM Q4-C
LCD CT N/A
GND
7seg A/LCD RS
7seg B/LCD WR
7seg C/LCD EN
Seg A
Seg B
Seg C
Seg D
Seg E
Seg F
Seg G
Seg H
GND
GND
U11
1
2
3
4
REF +
An_In
REF GND
8
7
6
5
VCC
SCLK
DOUT
CS
SCK
MISO
SS
TLC549CP
GND
SN74HC245N TRISTATE BUFFER
10K
VCC
VCC
Address Latch Output
4
3
R6
D2
1N4148
1
2
3
JP7
GND
VCC
VCC
19
18
4
5
RX2-RS232
TX2-RS232
RX1-RS232
TX1-RS232
8
13
6
9
GND
3
2
1
4
VCC
RS485
1
DIODE IR DET
VCC DS2
1
K A
C
P1.0
P1.1
P1.2
P1.3
P1.4
P1.5
P1.6
P1.7
RST
P3.0
P3.1
P3.2
P3.3
P3.4
P3.5
P3.6
P3.7
11
15
10
16
12
17
3
U1-32
U1-33
U1-34
U1-35
U1-36
U1-37
U1-38
U1-39
U1
R1
2
JP11
VCC
330
LED2
D4
PNA4613M00YB
GND
2
S2
1
2
D3
1N5235
VCC
MMIO WR U3-15
MM74HC573
U5
1
2
3
4
5
6
7
8
9
10
EA
ALE
PSEN
A15
A14
A13
A12
A11
A10
A09
A08
GND
VCC
20
19
Seg A
18
Seg B
17
Seg C
16
Seg D
15
Seg E
14
Seg F
13
Seg G
12
Seg H
11
DSP LE
OE Vcc
1D
1Q
2D
2Q
3D
3Q
4D
4Q
5D
5Q
6D
6Q
7D
7Q
8D
8Q
GND LE
RP3
1
GND
B
1
2
3
4
5
6
7
8
9
10
AD00
AD01
AD02
AD03
AD04
AD05
AD06
AD07
R5
U1-17
U1-16
U1-15
U1-14
U1-13
U1-12
U1-11
U1-10
U3-14
ALE
U1-30
PSEN
U1-29
GND
VCC
24
23
22
21
20
ISP OE Not Used
19
Key LE U6-11
18
Key OE (To U7-1)
17
N/C
16
DSP LE
15
MMIO WR JP9-4
14
MMIO RD JP9-3
13
10K R8
ATF22V10CQZ
GND
PROGRAMMABLE LOGIC
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
GND
VCC
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
IN
DS1
1
13
10
8
7
2
11
9
A
B
C
D
E
F
G
DP
14
3
CC
CC
a
f
b
g
e
c
d
dp
Q1
1
Key OE (To U3-18)
VCC
RP1-1
RP1-2
RP1-3
RP1-4
RP1-5
RP1-6
RP1-7
RP1-8
RP1
1
2
3
4
5
6
7
8
9
U7
RP1-1
RP1-2
RP1-3
RP1-4
RP1-5
RP1-6
RP1-7
RP1-8
1
2
3
4
5
6
7
8
9
10
10K
GND
OE Vcc
1D
1Q
2D
2Q
3D
3Q
4D
4Q
5D
5Q
6D
6Q
7D
7Q
8D
8Q
GND LE
20
19
18
17
16
15
14
13
12
11
AD00
AD01
AD02
AD03
C
2
3
GD
S
RFP30N06LE
JP17
1
2
3
4
5
6
7
8
9
10
11
GND
U1-39
U1-38
U1-37
U1-36
Q2
7seg B/LCD 1WR
FROM U1-2
SN74HC573N
GD
S
2
3
RFP30N06LE GND
H1
H2
1
C4
.1uF
C5
Vin
LM7805CT
Vout
7seg C/LCD 1EN
FROM U1-3
GD
S
1
GND
VCC
D
C6
.1uF
.1uF
2
JP4
Power In
2
H4
2
3
3
C10
Title
10uF
10V
Size
GND
3
JP5
Power Out
JP16
1
2
3
4
5
6
7
8
2
1
JP14
JP8
Power Jack
H3
Q3
VCC
Key LE
5V
JP9
MMIO Control
B
RFP30N06LE GND
U12
D1
1N4007
GND
VCC
3.3K
MMIO RD
GND
U3
1
2
3
4
5
6
7
8
9
10
11
12
16
15
14
13
12
11
10
9
SN74HC573N
(To U3-19)
1
2
20
R3
1K
20
19
18
17
16
15
14
13
12
11
OE Vcc
1D
1Q
2D
2Q
3D
3Q
4D
4Q
5D
5Q
6D
6Q
7D
7Q
8D
8Q
GND LE
A
JP6
PLD By pass
7-SEG
MM74HC573
7seg A/LCD RS
FROM U1-1
VCC
U1-39
U1-38
U1-37
U1-36
U1-35
U1-34
U1-33
U1-32
U1-39
U1-38
U1-37
U1-36
U1-35
U1-34
U1-33
U1-32
AD00
AD01
AD02
AD03
AD04
AD05
AD06
AD07
27
22
GENMEM
330
1
2
3
4
5
6
7
8
JP3
U6
GND
2N3906
Q5
B
2N3906
GND
R7 10K
A00
A01
A02
A14
U1-27
U1-28
A15
U1-39
AD00
RST IN N/A U9-12
U1-29
PSEN
U1-16
WR
U1-17
RD
VCC
EC
Q4
VCC
20
19
A00
18
A01
17
A02
16
A03
15
A04
14
A05
13
A06
12
A07
11 ALE
OE Vcc
1D
1Q
2D
2Q
3D
3Q
4D
4Q
5D
5Q
6D
6Q
7D
7Q
8D
8Q
GND LE
GND
7Seg Control Select
GND
2
4
3
2
1
Port 3
8
7
6
5
4
3
2
1
2
R9
12K
D JP13
P3.7
P3.6
P3.5
P3.4
P3.3
P3.2
P3.1
P3.0
24K
150K
GND
2
1
3
U1-28
U1-27
U1-26
U1-25
U1-24
U1-23
U1-22
U1-21
VCC
40
39
38
37
36
35
34
33
32
31
JP1-2
30
U4-11
29
U3-9
28
U3-5
27
U3-5
26
U2-26
25
U2-2
24
U2-23
23
U2-21
22
U2-24
21
U2-25
33pF
300K
R10
R12
EA U1-31
VCC
P0.0(AD0)
P0.1(AD1)
P0.2(AD2)
P0.3(AD3)
P0.4(AD4)
P0.5(AD5)
P0.6(AD6)
P0.7(AD7)
EA
ALE
PSEN
P2.7
P2.6
P2.5
P2.4
P2.3
P2.2
P2.1
P2.0
AT89S8252
LCD CT (currently not used)
External Addressing Enable
JP1
GND
3
2
1
P1.0
P1.1 (T2EX)
P1.2
P1.3
P1.4 (SS)
P1.5 (MOSI)
P1.6 (MISO)
P1.7 (SCK)
RST
P3.0 (RXD)
P3.1 (TXD)
P3.2 (INT0)
P3.3 (INT1)
P3.4
P3.5
P3.6 (WR)
P3.7 (RD)
XTAL1
XTAL2
GND
R13
50K
SW-PB-4pin
EC
Port 2
8
7
6
5
4
3
2
1
RT1
GND
JP12
A15
A14
A13
A12
A11
A10
A09
A08
4
3
t°
U1-8
U1-7
U1-6
U1-5
U1-4
U1-3
U1-2
U1-1
33pF
2
1
P1.7
P1.6
P1.5
P1.4
P1.3
P1.2
P1.1
P1.0
1
2
3
4
5
6
7
8
9
10
11
12
IR
13
14
15
WR To U3-10 16
RD To U3-11 17
18
19
11.0592MHz
20
Y1
1
2
GND
C1 XTAL
C2
1
Port 1
8
7
6
5
4
3
2
1
7seg A/LCD RS
7seg B/LCD WR
7seg C/LCD EN
Not Used
SS
MOSI
MISO
SCK
GND
AD07
AD06
AD05
AD04
AD03
AD02
AD01
AD00
GND
GND
20
1
3
2
U4
3
Port 0
8
7
6
5
4
3
2
1
C2+
C2+
C2C2VV-
GND
RS233
VCC
U10
8
VCC
DE
6
A
RE
7
B
R
5
GND
D
JP10
RX2
TX2
RX1
TX1
C1+
C1-
Serial Comm
GND
V+
14
3
2
1
SERIAL
1
2
3
4
5
6
7
8
AD04
AD05
AD06
AD07
GND
U8
7
1
2
3
4
5
6
7
8
9
10
AD00
AD01
AD02
AD03
Handshake In/Out
VCC
28
11
12
13
15
16
17
18
19
A0 VCC
A1
D0
A2
D1
A3
D2
A4
D3
A5
D4
A6
D5
A7
D6
A8
D7
A9
A10
A11
A12 WE
A13 OE
A14
GND CS
VCC
GND
10uF
10V
10K
B
U1-21
U1-22
U1-23
U1-24
U1-25
U1-26
GND
RP2
10K
SW-PB-4pin
C9
1
2
3
4
5
6
7
8
10
9
8
7
6
5
4
3
25
24
21
23
2
26
1
14
S1
1
2
P2
6
U2
A00
A01
A02
A03
A04
A05
A06
A07
A08
A09
A10
A11
A12
A13
1
2
3
4
5
6
7
8
Key pad Header
4
Number
Revision
B
1
2
3
4
5
6
7
8
ISP
A
1
2
3
4
5
6
7
8
5
JP15
A00
A01
A02
A03
A04
A05
A06
A07
9
8
7
6
5
4
3
2
1
P1
4
LCD Header
JP18
Display Output
2
JP2
Analog In
GND
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
1
GND
Date:
File:
Buffered I/O
5
2/20/2006
Sheet of
G:\Thesis-MicroprocessorBoard-090605\..uProBoard2.SchDoc
Drawn By :
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Protel

Schematic and PCB Libraries
 Custom components
 Link of files
Schematic library
PCB library
Protel

PCB Layout
– Physical representation
Protel

Design Rule Check (DRC)
– Short Circuits
– Broken Nets
– Height and Width Constraints
– Hole Size
– Clearance Constraints
Protel

Assembly Files
– Gerber Files
– NC Drill Files
.GTL Top Layer
.GBL Bottom Layer
.GTO Top Overlay
.GBO Bottom Overlay
.GTS
Top Soldermask
.GBS Bottom Soldermask
.GKO Keep-out Layer
.apr
.drr
.drl
Drill Files
Assembly Files

Top Silkscreen
Assembly Files

Top and Bottom Copper
Assembly Files

Top Soldermask and Bottom Soldermask
Assembly Files

Drill File
Creation of the PCB

Board Manufacture
– Advanced Circuits
 www.4PCB.com
 www.FreeDFM.com

Component Vendors
– Digikey
– All Electronics
Application
Microprocessor Projects

Microprocessor Design class:
 Digital Metronome
 T-Bird Taillights
 Digital Clock
 Serial Communication
 Memory Mapped Input/Output
 7-Segment Displays
 Keypad Input
 LCD Display
Microprocessor Projects

Digital Metronome
 T-Bird Taillights
 Digital Clock
– Port 3
SEC
MIN
Microprocessor Projects

Serial Communications
– Hyper-terminal
– RS232 buffer chip
– Serial cable
Microprocessor Projects

Serial Communications Cable
– DB9 to RJ45
Microprocessor Projects

Memory Mapped Input/Output
– Data latch
Microprocessor Projects

7-Segement Displays
– Data latch
– Programmable logic device
– FETs
Microprocessor Projects

Keypad
– Data latch
– PLD
Microprocessor Projects

Liquid Crystal Display
– Data latch
– PLD
Problems Encountered

Issues with new microcontrollers
– Chip burners
– Capacitance
– Internal Fuse Bits

In-System-Programming Circuit
In-System-Programming

Modification of the board is possible
– Buffer chip
– Programmable logic device
– Re-wire
Pin 20
Pin 8
RJ45 Jack
Programmable Logic
Device
Pin 8
Pin 19
In-System-Programming

ISP Cable
– DB25 to RJ45
Results
Completion

Board applied in the classroom
 Update from previous designs
 Capable of future updates
Future Design

Reduction of Components
 Dual Microcontrollers
 USB
 Surface Mount Components
Questions
References





Marcus O. Durham, PhD. Systems Design and the 8051.
Second Edition. TechnoPress. Tulsa, OK. 2003 – 2004.
Altium – Protel
http://www.4pcb.com
http://www.allelectronics.com
http://www.play-hookey.com/digital/experiments
/seven_seg_led.html