Transcript Third Generation Image Sensors: Opportunities and Challenges

THIRD GENERATION IMAGE SENSORS:
OPPORTUNITIES AND CHALLENGES
Electrochemical Society Meeting, 2012
Seattle, WA, USA
Orit Skorka and Dileepan Joseph
University of Alberta
Edmonton, AB, Canada
Outline
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 Introduction
 CCD and CMOS Sensors
 VI-CMOS Image Sensors
 Opportunities and Challenges
 Conclusion
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Introduction
Introduction
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 Applications for electronic image sensors are diverse
and cover the entire spectrum from γ-rays to THz.
 Examples include: machine vision, medical imaging,
space research, and consumer-use cameras.
 T. Suzuki, the Vice-President of Sony, has said (2010)
“In developing the CMOS image sensor, the goal is
exceeding human vision.” It remains a challenge!
 Vertically-integrated (VI) CMOS digital pixel sensor
(DPS) technology presents an opportunity to define
the next generation of electronic image sensors.
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CCD and CMOS Sensors
CCD and CMOS Sensors
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Year
Revenues ($ billion)
CCD (%)
CMOS APS (%)
2007
2012
2014
2.91
4.72
5.67
51.2
43.8
41.2
48.8
56.2
58.8
Taken from Frost & Sullivan,
World Image Sensor Market, 2008.
 Application diversity is increasing, where digital still
cameras make the largest end-user market.
 Mobile communications, medical imaging, optical
mice, video conferencing, toy games, and biometrics
also have significant market shares.
CCD and CMOS Sensors
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 The 1st generation of
image sensors used
charge coupled device
(CCD) technology.
 CCD inventors were
granted the 2009 Nobel
Prize in Physics.
 CCDs dominated the
market for 3 decades
Willard Boyle and George Smith
thanks to:
invented CCDs in 1969.
Photo: Alcatel-Lucent/Bell Labs, 1974.
 high resolution;
 low noise.
CCD and CMOS Sensors
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 2nd generation image
sensors used CMOS
active pixel sensor
(APS) technology.
 It was developed at
NASA’s Jet Propulsion
Laboratory.
 Dominated low-power
imaging thanks to:
Eric Fossum invented the
CMOS APS in 1994.
Photo: Amy Etra/BusinessWeek, 2011.
 On-chip integration with
CMOS devices;
 Simple supply system.
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VI-CMOS Image Sensors
VI-CMOS Image Sensors
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 “More Moore”:
 Focuses on device
miniaturization;
 Concerns digital circuits.
 “More than Moore”:
 Focuses on 3D ICs;
 Concerns heterogeneous
microsystems.
 Image sensors include
Dual-trend roadmap
of the ITRS, 2010.
photodetectors, analog
circuits, and digital
circuits.
VI-CMOS Image Sensors
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 Yole Développment expects a rapid growth in 3D
integration based on through-silicon vias (TSVs).
 They forecast a significant portion of the market
to be devoted to CMOS image sensors.
VI-CMOS Image Sensors
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 Our prototype (called
“Sensor 25” later) is
composed of:
 Standard CMOS die (0.8
μm) with APS array;
 Custom glass die with
photodetector array.
 It is assembled by flipLogarithmic VI-CMOS APS
array, designed and tested
at the UofA.
Skorka and Joseph, Sensors, 2011.
chip bonding.
 Each pixel has a bond
pad in both arrays.
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Opportunities and Challenges
Opportunities and Challenges
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Sensors 1–24 taken from
Skorka and Joseph,
Journal of Electronic
Imaging, 2011.
 Dynamic range (DR) and dark limit (DL) are the
most limiting factors of modern image sensors.
 Sensor 25 demonstrates wide DR and low DL.
Opportunities and Challenges
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Sensor 25
CCD (20 × 24)
Sensor 25
Technology
VI-CMOS APS
Response
logarithmic
A/D conversion
board level
Frame size
20 × 24
Frame rate
70 Hz
CCD image is downsampled
to match Sensor 25 pitch.
Pixel pitch [µm]
 Peak signal-to-noise-and-
PSNDR [dB]
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DL [cd/m2]
0.016
distortion ratio (PSNDR)
measures image quality.
Fill factor
DR [dB]
110
100%
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Opportunities and Challenges
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 With CCDs, analog-to-digital (A/D) conversion must
be done at board level and, with CMOS APS, it may
be done either at chip or column level.
 To overcome low PSNDR with logarithmic sensors, it
is preferable to have A/D conversion at pixel level
because digital data is more robust to noise.
 A new image sensor with a VI-CMOS DPS array (0.18
μm process) is being designed at the UofA.
 At Stanford, El Gamal also believes digital pixels are
inevitable to improve the performance of CMOS
image sensors. He works on linear sensors.
Opportunities and Challenges
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 Each pixel has a ΔΣ
Layout of a digital pixel in our
recent design of a logarithmic
VI-CMOS DPS array.
A/D converter (ADC),
including decimator.
 ΔΣ ADCs are ideal for
low-bandwidth and
high bit-resolution
applications, such as
digital audio.
 The design is based on
the patent-pending
work of Mahmoodi
and Joseph.
Opportunities and Challenges
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 Though still too large
Response of the inpixel ΔΣ ADC.
for optical imaging,
pixel size is competitive
for lens-less imaging, as
with medical X-rays.
 Using lower dose, VICMOS DPS technology
may enable video rate
X-ray imaging of soft
and dense tissues
simultaneously, given
further research.
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Conclusion
Conclusion
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 The global image sensor market is not only growing
quickly but also diversifying substantially.
 The semiconductor industry sees 3D integration as an
important part of its dual-trend roadmap. It facilitates
heterogeneous microsystems like image sensors.
 VI-CMOS DPS technology is expected to significantly
extend the design space of image sensors, which may
lead to a 3rd generation (revolutionary change).
 The technology will benefit invisible-band imaging in
the short term, and optical imaging in the long term,
e.g., to exceed human vision in all respects.
Acknowledgements
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We are grateful to our
longtime sponsors:
 NSERC;
 Alberta Innovates –
Technology Futures;
 CMC Microsystems;
Left to right: Orit Skorka,
Jing Li, and Dileepan Joseph
at the UofA, 2011.
 TEC Edmonton.
We also thank Dr. Mark
Alexiuk and IMRIS.