Generating minimum transitivity constraints in P-time for deciding Equality Logic Ofer Strichman and Mirron Rozanov Technion, Haifa, Israel Technion 1

Equality Logic

 A Boolean combination of equalities ( x 1 = x 2 Æ ( x 2 = x 3 Ç x 1  x 3 )) x 1 , x 2 , x 3 2 N  Typically combined with Uninterpreted Functions (EUF)  The decision problem for Equality Logic: NP – C Technion 2

Basic notions

 E : x = y Æ y = z Æ z  x (non-polar) Equality Graph: y x Gives an abstract view of  E Technion z 3

From Equality to Propositional Logic

Bryant & Velev CAV’00 – the

Sparse

method x 1  E : x 1 = x 2 Æ x 2 = x 3 Æ x 1  x 3  sk : e 1,2 Æ e 2,3 Æ :e 1,3  Encode all edges with Boolean variables  This is an abstraction  Transitivity of equality is lost!

 Must add transitivity constraints!

x 3 x 2 4 Technion

From Equality to Propositional Logic

Bryant & Velev CAV’00 – the

Sparse

method x 1  E : x 1 = x 2 Æ x 2 = x 3 Æ x 1  x 3  sk : e 1,2 Æ e 2,3 Æ :e 1,3 x 2  x 3 Transitivity Constraints : For each cycle of size n , forbid a true assignment to n -1 edges T S = ( e 1,2 ( e 1,2 ( e 1,3 Æ e 2,3 Æ e 1,3 Æ e 2,3 ! e 1,3 ) Æ ! e 2,3 ) Æ ! e 1,2 ) Check :  sk Æ T S Technion 5

From Equality to Propositional Logic

Bryant & Velev CAV’00 – the

Sparse

method  Thm-1: It is sufficient to constrain chord-free simple cycles F e 1 T e 2 T e 5 F e 3 T  T e 4 There can be an exponential number of chord-free simple cycles… Technion 6

From Equality to Propositional Logic

Bryant & Velev CAV’00 – the

Sparse

method  Make the graph ‘chordal’.

 In a chordal graph, it is sufficient to constrain only triangles.

  Polynomial # of edges and constraints.

# constraints = 3 £ #triangles Technion 7

An improvement

Reduced Transitivity Constraints

(RTC)  So far we did not consider the polarity of the edges.  E : x = y Æ y = z Æ z  x  Assuming  E is in Negation Normal Form y (polar) Equality Graph: x  Technion z 8

An improvement

Reduced Transitivity Constraints

(RTC)  Here, T R = e 3 Æ e 2 ! e 1 is sufficient z T e 1  F T e 3

Allowing e.g.

: x = z , x = y , z  ’: x = z , x = y , z  = y y  = x e 2 y T This is only true because of monotonicity of NNF Technion 10

Definitions

 Dfn-1: A

contradictory cycle

one disequality edge.

is a cycle with exactly T T C = T T  F  Dfn-2: A contradictory Cycle C is

constrained

T if T under does not allow an assignment in which dashed edges are True and the solid edge is False.

Technion 11

Main theorem

 Let T R be a conjunction of transitivity constraints.  If T R constrains all simple contradictory cycles then  E is satisfiable iff  sk Æ T R is satisfiable

The Equality Formula

12 Technion

Proof strategy for the main theorem

 (  ) Proof strategy:    Let  R be a satisfying assignment to  sk Æ T R We will construct  S that satisfies  sk From this we will conclude that 

E

Æ T S is satisfiable Technion

Skip proof

13

Transitivity:

5 constraints

RTC:

0 constraints T T T F T Technion

Transitivity

: 5 constraints

RTC

: 1 constraint 14

Applying RTC

 How can we use the theorem without enumerating contradictory cycles ?  Answer:  Consider the chordal graph .  Still – which triangles ? in which direction? Technion 15

Our CAV’05 solution x 0 x 2 x 4

cache:

e 0,2 Æ e 1,2  e 0,1 1,3 Æ e 2,3  e 1,2 e 2,4 Æ e 3,4  e 2,3 e 4,5 Æ e 3,5  e 3,4 x 1 x 3 x 5  Exp # cycles to traverse.  Solution: Stop before adding an existing constraint  With a cost: must constrain non-simple cycles as well.

Technion 16

Constraining

simple

contradictory cycles x 0 x 7 x 2 1. Focus on each solid edge e s separately - (find its dashed Bi-connected component) 2. Make the graph chordal x 4 e s x 1 x 3 x 5 x 6 Technion Do we need: e 5,6 Æ e 3,6 !

e 3,5 ?

19

Constraining

simple

contradictory cycles x 2 x 4 x 0 e s x 1 x 3 yes!

Technion x 5 x 6 e e 5,6 Æ e e 3,6 !

!

e e 3,5 ?

?

20

Constraining

simple

contradictory cycles 3. Remove a vertex x k that

leans

on an edge ( x i , x j ) 4. Is ( x i , x j ) on a simple cycle with e s ? O(|E|) 5. If yes, add (e k,i Æ e k,j !

e i,j ) e 5,6 Æ e 3,6  e 3,5 x 0 x 2 x 4 e s x 1 x 3 x 5 x 6 21 Technion

1.

2.

3.

Constraining

simple

contradictory cycles Remove a vertex v k that

leans

on an edge (v i ,v j ) Does (v i ,v j ) on the same simple cycle with e s ? If yes, add (e k,i Æ e k,j !

e i,j ) e 5,6 Æ e 3,6  e 3,5 x 0 x 2 x 4 e s x 1 x 3 x 5 x 6 22 Technion

Random graphs (Satisfiable) Technion 23

Results – random graphs

400000 350000 300000 250000 200000 150000 100000 50000 0 10 30

% dashed

50 V=200, E=800, 16 random topologies # constraints: Run time: reduction of 17% reduction of 32% Technion 70 RTC RTCS 24

Results – random graphs

250 200 150 100 450 400 350 300 50 0 1 2

% dashed

3 V=200, E=800, 16 random topologies # constraints: Run time: reduction of 17% reduction of 32% Technion 4 RTC RTCS 25

A crafted example

2 n assignments satisfy  sk . None satisfy the theory.

Technion 26

Results Uclid benchmarks* (all unsat) * Results strongly depend on the reduction method of Uninterpreted Functions.

Technion 27

 Possible refutations of CNF’s generated by Sparse Boolean Encoding B B P0 Æ P3 P4 P1 T S T R P2 T S – T R P2 Transitivity constraints Constraints of the form Hypothesis: ( T S Thm: B – T R ) clauses hardly participate in the proof is satisfiable !

e 1 B Æ Æ ( e T 2 S !

– e 3 T R ) is satisfiable Technion 28

T R T R

CNF

B T S T R

Average on

:

10 graphs, ~890K clauses All Unsat Sparse: ~ 22 sec.

RTC: ~ 12 Sec.

Core

B B – Boolean encoding T R – RTC constraints T S – Sparse constraints Technion T S T R 29

Summary

 The RTC method is ~ dominant over the Sparse method.

 Open issue: find a P-time algorithm that exploits the full power of the main theorem.

Technion 30

Example: Circuit Transformations

Stage 1

 A pipeline processes data in stages  Data is processed in parallel – as in an assembly line  Formal Model:

Stage 2 Stage 3

Technion 38

Example: Circuit Transformations

 The maximum clock frequency depends on the longest path between two latches  Note that the output of g is used as input to k  We want to speed up the design by postponing k to the third stage 39 Technion

Validating Circuit Transformations

?

=

Technion 40

Validating a compilation process

 Target program u 1 = x 1 + y 1 ; u 2 = x 2 z = u 1  + y 2 ; u 2 ; Compilation  Source program z = ( x 1 + y 1 )  ( x 2 + y 2 );  Need to prove that: ( u 1 = x 1 + y 1  u 2 = x 2 + y 2  z = u 1  u 2 ) $ z = ( x 1 + y 1 )  ( x 2 + y 2 ) Target Source Technion 41

Validating a compilation process

 Target program u 1 = x 1 + y 1 ; u 2 = x 2 z = u 1  + y 2 ; u 2 ; Compilation  Source program z = ( x 1 + y 1 )  ( x 2 + y 2 );  Need to prove that: ( u 1 = x 1 + y 1  u 2 = x 2 + y 2  z = u 1  u 2 ) $ z = ( x 1 + y 1 )  ( x 2 + y 2 ) f 1 f 2 g 1 f 1 f 2 g 2 Technion 42

Validating a compilation process

 Instead, prove: under functional consistency : for every uninterpreted function f  x = y ! f ( x ) = f ( y ) Need to prove that: ( u 1 = x 1 + y 1  u 2 = x 2 + y 2  z = u 1  u 2 ) $ z = ( x 1 + y 1 )  ( x 2 + y 2 )  Which translates to (via Ackermann’s reduction): f 1 f 2 g 1 f 1 f 2 g 2 Technion 43

Definitions for the proof…

 A

Violating cycle

under an assignment  R : Either dashed or solid e F F T e T1 T e T2  This assignment violates T S but not necessarily T R Technion 45

More definitions for the proof…

 An edge e = ( v i , v j ) is

equal under an assignment

 there is an equality path between v i T under  .

Denote :

and v j iff all assigned v 3 v 1 F T T T T v 2 Technion 46

More definitions for the proof…

 An edge e = ( v i , v j ) is

disequal under an assignment

iff there is a disequality path between v i and v j in  which the solid edge is the only one assigned false by  .

Denote :

v 3 v 1 F T T T T v 2 Technion 47

Proof…

 Observation 1: The combination is impossible if  =  R (recall:  R ² T R ) v 3 F T T v 1  Observation 2: if ( v 1 , v 3 ) is solid, then Technion v 2 48

ReConstructing

 S Type 1: It is

not

the case that Type 2: Otherwise it is

not

the case that v 3 v 3 F T  F T F  T T T v 1 v 2 v 1  Assign  S ( e 23 ) = F  Assign  ( e 13 ) = T In all other cases  S =  R Technion v 2 49

ReConstructing

 S  Starting from  R , repeat until convergence:    ( e T ) := F  ( e F ) := T in all Type 1 in all Type 2 cycles cycles  All Type 1 and Type 2 triangles now satisfy T S  B is still satisfied (monotonicity of NNF)  Left to prove: all contradictory cycles are still satisfied Technion 50

Proof…

 Invariant: contradictory cycles are not violating throughout the reconstruction.

v 3 T F T T T  F v 1 v 2  contradicts the precondition to make this assignment… Technion 51

Proof…

 Invariant: contradictory cycles are not violating throughout the reconstruction.

v 3 T F  T T F T v 1 v 2  contradicts the precondition to make this assignment… Technion 52

Constraining

simple

contradictory cycles The constraint e 3,6 Æ e 3,5  e 5,6 is not added

cache: …

e 5,6 Æ e 4,6  e 4,5 x 0 x 2 x 4 x 1 x 3 x 5 Open problem: constrain simple contradictory cycles in P time Technion x 6 53

Constraining

simple

contradictory cycles e 3,6 Æ e 3,5  e 5,6 is not added, though needed Here we will stop, although …

cache: …

e 5,6 Æ e 4,6  x 0 x 2 x 4 e 4,5 x 1 x 3 x 5 Open problem: constrain simple contradictory cycles in P time Technion x 6 54